Patent
1976-12-27
1978-06-13
Larkins, William D.
357 20, 357 22, 357 34, 357 46, 357 48, H01L 2702, H01L 2980, H01L 2972, H01L 2906
Patent
active
040952525
ABSTRACT:
A JFET is coupled in parallel with a bipolar transistor to produce a composite structure that has improved signal transfer characteristics in certain circuit applications. While useful with discrete devices, the combination is readily achieved in integrated circuit form.
REFERENCES:
patent: 3408544 (1968-10-01), Teszner
Lewis et al. "Single Device Cell Using Vertical Junction FET" IBM Technical Disclosure Bulletin vol. 15, (2/73), p. 28.
Larkins William D.
Munson Gene M.
National Semiconductor Corporation
Woodward Gail W.
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