Component and method for manufacture

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S118000, C438S121000, C438S125000, C438S051000, C438S055000, C438S064000

Reexamination Certificate

active

06514789

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates, in general, to electronic components and, more particularly, to protection of electronic devices using cap wafers.
BACKGROUND OF THE INVENTION
Due to their size, devices such as microelectronic sensors and integrated circuits are vulnerable to damage from handling, small particles, and moisture. Micromachined devices are typically placed in an enclosure to protect them during operation. One prior art component includes a cap wafer bonded to a semiconductor substrate for enclosing and hermetically sealing an electronic sensor from the environment. Holes are formed in the cap wafer prior to bonding the cap wafer to the substrate. Holes in the cap wafer provide for electrically connecting the sensor to external circuitry.
The holes in the cap wafer may weaken the mechanical structural reliability of the cap wafer. One solution to this problem is to increase the thickness of the cap wafer so that the structural integrity of the cap wafer is improved. However, increasing the thickness of the cap wafer also increases the size and cost of the microelectronic device.
Accordingly, it would be advantageous to have a component that provides protection to micromachined devices therein during operation. It would be of further advantage for the component to be size and cost efficient. In addition, it would be advantageous to have a method for manufacturing the component that is compatible with standard semiconductor processes.


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Patent Abstracts of Japan, vol. 1998, No. 2, Jan. 30, 1998.

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