Compliant relief wafer level packaging

Details Compliant relief wafer level packaging Compliant relief wafer level packaging

2005-05-03

2005-05-03

Clark, S. V. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Ball or nail head type contact, lead, or bond

C257S783000

Reexamination Certificate

active

06888256

ABSTRACT:
A semiconductor structure includes a semiconductor substrate and a compliant interconnect element disposed on a first surface of the substrate. The compliant interconnect element defines a chamber between the first surface of the substrate and a surface of the compliant interconnect element. The compliant interconnect element can be a compliant layer. The compliant layer can be formed of a polymer, such as silicone. A conductive layer can be disposed on the compliant layer, in contact with a contact pad on the semiconductor substrate. A method for forming a semiconductor structure includes providing a semiconductor substrate and providing a compliant interconnect element on a first surface of the substrate, so that the compliant interconnect element defines a chamber between the compliant interconnect element and the first surface of the substrate.

REFERENCES:
patent: 5956605 (1999-09-01), Akram et al.
patent: 6002180 (1999-12-01), Akram et al.
patent: 6011306 (2000-01-01), Kimura
patent: 6040618 (2000-03-01), Akram et al.
patent: 6333555 (2001-12-01), Farnworth et al.
patent: 6365974 (2002-04-01), Abbott et al.
patent: 6548897 (2003-04-01), Grigg

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