Complex number calculation circuit

Details Complex number calculation circuit Complex number calculation circuit

1996-09-19

1998-05-12

Hoff, Marc S.

Boots, shoes, and leggings

341155, G06C 1508

Patent

active

057516243

ABSTRACT:
A complex number calculation circuit for directly multiplying a complex number of an analog signal by a digital complex number as a multiplier. A capacitive coupling is used with a plurality of parallel capacitances corresponding to weights of bits of real and imaginary parts of the multiplier. The sign of the multiplier is represented by selection of output paths. A complex number calculation circuit for calculating approximated absolute values is suitable for an analog architecture. Inverter circuits are used for linear inversion of analog values, and capacitive couplings are used for weighted addition. Analog maximum and minimum circuits with parallel MOSs are used for maximum and minimum calculation.

REFERENCES:
patent: 3926367 (1975-12-01), Bond et al.
patent: 4747067 (1988-05-01), Jagodnik, Jr. et al.
patent: 5119037 (1992-06-01), Ichiyoshi
patent: 5420806 (1995-05-01), Shou et al.
"Dual 64-TAP, 11 Mcps Digital Matched Filter/Correlator Stel 3310", Stanford Telecom, 1990, Jul. 1990, pp. 125-126, 130, 136.

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