Complementary voltage interpolation circuit with transmission de

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

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341156, 341169, H03M 136

Patent

active

048976563

ABSTRACT:
The invention centers around a system for interpolating between multiple pairs of complementary main signals to generate further pairs of complementary signals. An input circuit (10) supplies the main signals. The interpolation is a two-step operation. The first step is done with two strings (S and S.sub.N) of impedance elements (R.sub.0 -R.sub.N-1 and R.sub.N0 -R.sub.NN-1). Each pair of main signals is supplied to a corresponding pair of nodes along the strings. Interpolated signals are taken from other pairs of corresponding nodes along the strings. In the second interpolation stage, a delay network (D) formed with additional impedance elements (R.sub.D0 -R.sub.DN-1 and R.sub.DN0 -R.sub.DNN-1) compensates for transmission delays through the impedance elements that make up the strings.

REFERENCES:
patent: 4058806 (1977-11-01), Nadler
patent: 4270118 (1981-05-01), Brokaw
patent: 4325054 (1982-04-01), van de Plassche
patent: 4386339 (1983-05-01), Henry et al.
patent: 4737766 (1988-04-01), van de Plassche
J. Peterson, "A Monolithic Video A/D Converter", IEEE JSSC, Dec. 1979, pp. 932-937.
R. van de Plassche et al., "A High-Speed 7 Bit A/D Converter," IEEE JSSC, Dec. 1979, pp. 938-943.
R. van de Grift et al., "A Monolithic 8-Bit Video A/D Converter," IEEE JSSC, Jun. 1984, pp. 374-378.

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