Complementary transistor structure

Details Complementary transistor structure Complementary transistor structure

1980-01-18

1982-11-02

Munson, Gene M.

Metal treatment

Stock

Ferrous

357 34, 357 59, 357 65, 357 90, 357 91, 148 15, H01L 2702, H01L 2972

Patent

active

043576222

ABSTRACT:
Complementary, vertical bipolar NPN and PNP transistors are fabricated on the same monolithic semiconductor substrate which have matched high performance characteristics. A method for fabricating such complementary devices is also provided. In the method, a barrier region of a first conductivity type is formed on the surface of the monocrystalline semiconductor substrate doped with a second conductivity type. After an annealing heat treatment to drive in the doping ions of the barrier region, a collector region for one of the complementary transistors of a second conductivity type is formed within the barrier region. It is convenient to simultaneously form isolation regions of a second conductivity type in the substrate while forming the collector region. A collector region of a first conductivity type is then formed in the substrate for the other of the complementary transistors. The collector region for the other complementary transistor is formed within at least one other isolation region. An epitaxial layer of semiconductor material doped with ions of the first conductivity type is then formed on the surface of the substrate.
To provide improved PNP transistor performance, the P-type emitter for the PNP transistor is formed prior to a last drive-in treatment by forming a polycrystalline silicon layer on the exposed surface of the base. The polycrystalline silicon is doped with a P-type dopant. Thereafter the transistor structure is subjected to conditions whereby the doping ions contained in the polycrystalline silicon layer are driven into the epitaxial layer to provide a shallow emitter region without effecting dislocations in the silicon lattice of the epitaxial layer.

REFERENCES:
patent: 3702428 (1972-11-01), Schmitz et al.
patent: 3730786 (1973-05-01), Ghosh
Davis et al, "Design of an Integrated Circuit . . . ", IEEE J. Solid-State Circuits, vol. SC-14 (2/79) pp. 109-120.
Abbas et al, "Complementary Bipolar Transistor Process Using Seven Masking Steps", IBM Technical Disclosure Bulletin, vol. 16 (10/73) pp. 1630-1631.
Chang et al, "Complementary Bipolar Device Structure", IBM Technical Disclosure Bulletin, vol. 17 (6/74) pp. 21-22.

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