1987-08-12
1989-08-29
Wojciechowicz, Edward J.
357 43, 357 44, 357 48, 357 49, 357 50, 357 55, H01L 2702
Patent
active
048622400
ABSTRACT:
A monolithic complementary semiconductor device comprising n-type and p-type well regions separated by a dielectric isolation region extending from the surface into the substrate region. The well region includes a highly doped buried region which is located at the bottom of the well region and separates an active region in the well from the substrate region. The isolation region is deeper than the buried region. The well-to-well isolation is enhanced by the combination of the buried region and the deep dielectric isolation region. Packing density and the high speed operation can also be improved.
REFERENCES:
patent: 4470062 (1984-09-01), Muramatsu
patent: 4536945 (1985-08-01), Gray et al.
patent: 4571818 (1986-02-01), Robinson et al.
Ikeda Takahide
Momma Naohiro
Nagano Takahiro
Saito Ryuichi
Watanabe Atsuo
Hitachi , Ltd.
Wojciechowicz Edward J.
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