Complementary semiconductor device

Details Complementary semiconductor device Complementary semiconductor device

1989-01-05

1991-02-19

Hille, Rolf

357 22, 357 42, 357 61, 357 2312, H01L 29161, H01L 2980, H01L 2702, H01L 2978

Patent

active

049948660

ABSTRACT:
A complementary semiconductor device (CMOS gate) including a p-channel transistor (PMOS FET) and an n-channel transistor (NMOS FET). A silicon substrate, a channel layer for the p-channel transistor which comprises a first Si.sub.1-x Ge.sub.x layer, a Ge layer, and a second Si.sub.1-x Ge.sub.x layer are formed in sequence on the silicon substrate. A silicon layer, as another channel layer for the n-channel transistor, is formed on the channel layer. The ratio "x" of the first Si.sub.1-x Ge.sub.x layer is continuously increased from 0 to 1, and the ratio "x" of the second Si.sub.1-x Ge.sub.x layer is continuously decreased from 1 to 0.

REFERENCES:
patent: 4013979 (1977-03-01), Vittoz
patent: 4710788 (1987-12-01), Dambkes et al.
patent: 4729000 (1988-03-01), Abrokwah

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