Amplifiers – Sum and difference amplifiers
Reexamination Certificate
2000-12-19
2002-03-19
Pascal, Robert (Department: 2817)
Amplifiers
Sum and difference amplifiers
C330S103000, C330S165000
Reexamination Certificate
active
06359505
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates in general to communication systems and components, and is particularly directed to a complementary driver pair-based circuit architecture having a synthesized output impedance, and substantially reduced power requirements for driving a telecommunication line, such as, but not limited to a high data rate digital subscriber line (HDSL).
BACKGROUND OF THE INVENTION
As described in the U.S. Patent to Joffe et al, U.S. Pat. No. 5,856,758, assigned to the assignee of the present application and the disclosure of which is incorporated herein, the often demanding installation and operational parameters of many of today's telecommunication system applications make it necessary to employ line driver circuits having extremely low distortion and highly linear signal components. One of the basic, unalterable requirements of a line driver is that its output impedance match the characteristic impedance of the line.
As diagrammatically shown in the ‘classical’ circuit architecture of
FIG. 1
, this impedance matching requirement has been conventionally accomplished by terminating the output
11
of a line driver amplifier
10
with a line-coupling output resistor
13
, whose value Ro is set equal to the impedance Rt (e.g., 135 ohms) of the line
15
. Unfortunately, the resulting voltage divider formed by output resistor
13
and line impedance
15
dissipates (wastes) half of the line driver's output power in the output impedance
13
. This implies that, for each volt of signal swing to be imparted to the line
15
, a two volt swing is required at the output
11
of the amplifier
10
.
This unwanted power dissipation or loss can be reduced by synthesizing the output impedance of the driver through the use of a much smaller resistor, and simulating the same line-matching impedance by the judicious use of positive feedback. A typical set of synthetic impedance parameters involves reducing the value of the output resistor to only a fraction (e.g, one-fourth) of its normal value, and (electronically) synthesizing the remaining portion (e.g., three-fourths) of the output impedance. In the case of a one-fourth-three-fourths split, the output voltage swing of the driver amplifier is reducible from twice to only five-fourths the desired output voltage. In the ideal case, the amplifier power supply rails can be reduced to five-eighths of the supply differential for a classic driver.
It is not uncommon for circuit implementations of synthetic output impedance drivers to employ some form of relatively complex cross-coupling network or other feedback arrangements. As shown in the circuit diagram of
FIG. 2
, a synthesized impedance driver may be modelled as containing a voltage source Vm and an output impedance formed of two parts: 1—a synthetic resistance Rsyn, and 2—a physical output resistance Rphy. The voltage swing produced by the amplifier is Va, and the voltage swing across a load resistance RL (relative to a ground reference) is VL.
For the case of reducing the physical resistor to one-fourth of its normal value, then Rphy=25% of RL and Rsyn=75% of RL. Therefore, the driver voltage source Vm must be capable of producing a voltage swing of 2VL. As pointed out above, the voltage Va at the output node of the amplifier need only swing to {fraction (5/4)} VL.
In some applications, Va must swing to a voltage greater than{fraction (5/4)} VL. For example, if the value of the load resistor RL is increased substantially, Va would have to swing to almost 2VL. While this may cause clipping, it entails the benefit of reduced output current with increased output voltage swing. The synthetic impedance line driver might also be required to swing to 2VL, just as in the case of the classical line river. In this case, however, the synthetic driver is delivering zero or minimum current, while the classic driver is delivering its maximum output current.
Another significant consideration occurs in echo-canceled systems, where line drivers ‘face’ each other at opposite ends of a wireline loop. In this case, Va is determined as the superposition of both ‘near’ end and ‘far’ end drivers. In some cases, Va may actually have to be larger than Vm, which requires significant attention to overall system design. This problem is typically addressed by reducing the power on relatively short cables.
In accordance with the invention disclosed in the above-referenced Joffe et al Patent, the line driver circuit employs a positive feedback architecture that reduces the required output signal amplitude excursion required for driving the line, enhances linearity, and allows the line to be driven from amplifiers which run with a lower supply voltage, and thus results in lower power dissipation. The use of a dramatically lower valued output resistor allows the amount of power dissipated across the driver's output resistor to be reduced from the one-half value of a classical driver; yet, due to positive feedback, the effective electrical output impedance seen at the line driver's output node is matched to the line impedance. As a non-limiting example, the synthetic driver configuration of the Joffe et al patent is particularly suited for (extended range) ISDN applications.
SUMMARY OF THE INVENTION
The present invention is also directed to the use of positive feedback for implementing a synthesized impedance line driver circuit, and is especially suited for high data rate signaling, such as but not limited to high data rate digital subscriber line (HDSL) applications. The driver architecture of the invention employs a complementary driver pair whose outputs are coupled through relatively low valued output resistors to a line-coupling transformer. In addition, node connections of the output resistors with respective end terminals of the input winding of the line-coupling transformer are cross-coupled to inputs of the complementary drivers. The parameters of this cross-coupled circuit configuration are such as to produce a relatively large (time-N) multiplication of the small valued output resistors, to values that enable the complementary driver circuit to synthesize an output impedance that matches the impedance of the driven line.
In accordance with a first embodiment, the output impedance-syntheisizing line driver includes first and second operational amplifiers that are coupled between complementary input and output ports. Positive feedback is provided by a first summing resistor cross-coupled between the first output port and an input of the second amplifier, and by a second summing resistor cross-coupled between the second output port and an input of the first amplifier. Each amplifier has an output resistor whose value is several orders of magnitude lower than those of the input and feedback resistors, and is selected in accordance with the operational parameters of the line.
As will be described, for a typical telecommunication application, the input, feedback, and cross-coupled summing resistors, which are used to set the gain parameters of the driver, may have resistance values on the order of one or more kilohms, while the output resistors, whose values are multiplied up to values that enable the circuit to realize a synthetic output impedance necessary for matching the impedance of the driven line (e.g., 135 ohms), may have a resistance value on the order of only several ohms, significantly decreasing power dissipation and reducing supply rail requirements.
Pursuant to a second embodiment of the present invention, the complementary pair-based synthetic line driver circuit architecture of the first embodiment described above is augmented to include a cross-coupled auxiliary resistor network used to derive a near-end signal for driving an analog canceler. These resistors allow a near-end signal to be taken from the driver output and effectively cancels out far end signal components present in the analog canceler drive signal. This resistor network includes a first series connected resistor branch coupled between one end of the output resistor
Adtran Inc.
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Choe Henry
Pascal Robert
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