Complementary metal-oxide-semiconductor translator

Details Complementary metal-oxide-semiconductor translator Complementary metal-oxide-semiconductor translator

1989-05-09

1990-09-18

Mullins, James B.

Amplifiers

Signal feedback

Nonlinear impedance element in loop path

307548, 330264, H03F 134

Patent

active

049581325

ABSTRACT:
A CMOS translator which includes an amplifier having an input node and an output node; a first clamp for providing a clamped feedback signal from the output node to the input node of the amplifier; and a second clamp for providing a clamped feedforward signal from the input node to the output of the amplifier. ECL signals are translated up to CMOS voltage levels with high speed, low power consumption via a circuit with requires minimal die area. The unique clamping arrangement provides a self-biasing feature which affords a large error margin.

REFERENCES:
Kennedy et al., "Active Clamp Circuit Uses Only Two Transistors", Electronic Design, 24, Nov. 22, 1969, p. 92.
Grebene, "Bipolar and MOS Analog Integrated Circuit Design", A Wiley-Interscience Publication, 1984, Section 6.4, pp. 290-294.
Gregorian et al., "Analog MOS Integrated Circuits for Signal Processing", A Wiley-Interscience Publication, 1986, p. 398.

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