Complementary metal-oxide semiconductor integrated circuit devic

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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357 41, 357 47, 357 53, 307253, H01L 2702

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048704717

ABSTRACT:
A complementary metal-oxide semiconductor integrated circuit device comprises a plurality of pairs of N- and P-channel metal-oxide semiconductor transistors (01a, 02a, 03a, 04a; 01b, 02b, 03b, 04b). The plurality of pairs are juxtaposed with respect to each other and no isolation areas are formed between the respective pairs. A single pair or a series of pairs out of the plurality of pairs constitute a functional device (30). The gate electrodes (311a, 311b) of the N- and P-channel metal-oxide semiconductor transistors in the pair adjacent to the functional device (30) are held in relatively negative (GND) and positive (V.sub.DD) potential voltages, respectively, so that the functional device (30) is electrically isolated from the remaining portions.

REFERENCES:
patent: 3967988 (1976-07-01), Davidsohn
patent: 4161662 (1979-07-01), Malcolm et al.
patent: 4233672 (1980-11-01), Suzuki et al.
patent: 4240093 (1980-12-01), Dingwall
patent: 4288804 (1981-09-01), Kikuchi et al.
patent: 4356504 (1982-10-01), Tozun
Ashida et al.: "A 3000-Gate CMOS Masterslice LSI", Japanese Journal of Applied Physics, vol. 19, (1980) Supplement 19-1, pp. 203-212.

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