Complementary LVTSCR ESD protection circuit for sub-micron CMOS

Details Complementary LVTSCR ESD protection circuit for sub-micron CMOS Complementary LVTSCR ESD protection circuit for sub-micron CMOS

1995-04-14

1996-11-19

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

Device protection

257175, 257141, 257146, 257361, 257362, 361 90, 361100, 361111, 327582, H01L 2974

Patent

active

055765572

ABSTRACT:
An electrostatic discharge (ESD) circuit for protecting a semiconductor integrated circuit (IC) device is disclosed. One ESD circuit is located between each I/O buffering pad that connects to one lead pin and the internal circuitry of IC. The ESD circuit is connected to both power terminals. The ESD circuit comprises first and second low-voltage-trigger SCRs (LVTSCRs), each having an anode, a cathode, an anode gate and a cathode gate. The anode and anode gate of the first SCR are connected to a first power terminal, the cathode of the first SCR is connected to its I/O buffering pad, and the cathode gate of the first SCR is connected to the second power terminal. The ESD circuit further comprises a PMOS transistor having drain, source, gate, and bulk terminals. The PMOS transistor's gate, source and bulk terminals are connected to the first power terminal, the PMOS transistor drain terminal is connected to the cathode gate of the first SCR. The cathode and cathode gate of the second SCR are connected to the second power terminals. The anode of the second SCR is connected to its associated I/O buffering pads. The anode gate of the second SCR is connected to the first power terminal. The ESD circuit also comprises an NMOS transistor having drain, source, gate, and bulk terminals. The NMOS transistor's gate, source and bulk terminals are connected to the second power terminals. The NMOS transistor's drain terminal is connected to the anode gate of the second SCR.

REFERENCES:
patent: 5289334 (1994-02-01), Ker et al.
patent: 5359211 (1994-10-01), Croft
patent: 5400202 (1995-03-01), Mtez et al.

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