Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2000-06-30
2001-10-16
Pascal, Robert (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S261000
Reexamination Certificate
active
06304141
ABSTRACT:
FIELD
The present invention relates generally to differential amplifiers, and more specifically to differential amplifiers with gain compensation.
BACKGROUND OF THE INVENTION
Differential amplifiers typically amplify the difference between two input signals. Differential-mode gain measures the amount of amplification of the difference between the two input signals, and is typically very high. In an ideal differential amplifier, differential-mode gain is constant as the two input signals move up and down in voltage together (known as the “common-mode input voltage”). When the differential-mode gain varies as the input common-mode voltage changes, the output signal may exhibit timing variation, or “jitter.”
Typical differential amplifiers include a pair of input transistors that switch current from one load to another. As the input common-mode voltage approaches a voltage rail, differential-mode gain tends to drop. U.S. Pat. No. 4,958,133 issued Sep. 18, 1990 describes a complementary self-biased differential amplifier that includes two complementary differential amplifiers combined to provide a rail-to-rail common-mode input voltage range. Each of the differential amplifiers continues to operate near one voltage rail when the other differential amplifier tends to turn off. This results in the differential-mode gain that drops to approximately ½ of its maximum value when the common-mode input voltage is near either voltage rail. There is also a corresponding decrease in amplifier output impedance near either voltage rail. The varying differential-mode gain across the common-mode input voltage range can cause jitter.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for a differential amplifier with reduced differential gain variation across a wide common-mode input voltage range.
REFERENCES:
patent: 4797631 (1989-01-01), Hsu et al.
patent: 4958133 (1990-09-01), Bazes
patent: 5515003 (1996-05-01), Kimura
patent: 5602509 (1997-02-01), Kimura
patent: 6137360 (2000-10-01), Memida
IEEEJournal of Solid State Circuits, Compact Low-Voltage Power-Efficient Operational Amplifier Cells for VLSI, Oct. 1998.*
Coban, A.L., et al., “A 1.75V rail-to-rail CMOS op amp”,1994 IEEE International Symposium on Circuits and Systems, vol. 5 of 6, 497-500, (1994).
de Langen, K., et al., “Compact Low-Voltage Power-Efficient Operational Amplifier Cells for VLSI”,IEEE Journal of Solid-State Circuits, vol. 33, 1482-1496, (Oct. 1998).
Sakurai, S., et al., “Robust Design of Rail-to-Rail CMOS Operational Amplifiers for a Low Power Supply Voltage”,IEEE Journal of Solid-State Circuits, vol. 31, 146-156, (Feb. 1996).
Kennedy Joseph T.
Martin Aaron K.
Mooney Stephen R.
Nair Rajendran
Choe Henry
Intel Corporation
Pascal Robert
Schwegman Lundberg Woessner & Kluth P.A.
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