Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-10-05
2001-06-26
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C330S253000
Reexamination Certificate
active
06252435
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to CMOS comparators, and more particularly to CMOS wide-range differential amplifiers.
BACKGROUND OF THE INVENTION
Differential signals are often used for transmitting data. Fast (100 Mbps) Ethernet and asynchronous-transfer-mode (ATM) networks use differential signals to improve speed and noise immunity. The speed of these differential signals is increased when the transition is over a reduced voltage range, as output capacitances are charged and discharged over a smaller voltage range, requiring less current.
Often a signal with small voltage changes is applied to the differential input along with a constant bias voltage applied to both inputs. The common bias voltage is cancelled out, since it is applied to both of the differential inputs. However, this common bias voltage can vary at times.
Common-mode variations of the bias voltage affect both of the differential signals by the same amount so that data is not lost. Termination, power-supply variations, and voltage drops across transmission lines can alter common-mode input voltages. Using differential input signals cancels out these variations since both inputs are altered by the same amount. However, as the change in input voltages increases, some receivers are less responsive and may even fail. Thus, receivers often have a limited common-mode range.
A desirable feature of differential amplifiers is a wide common-mode input range. A wide input range allows the input voltage to move outside of a strict narrow voltage range. While complementary metal-oxide-semiconductor (CMOS) differential amplifiers have a relatively wide range, a problem is that the differential n-channel transistors can turn off as the common-mode input voltage is reduced to around 1 volt above ground. Thus standard CMOS differential amplifiers do not have as wide a common-mode range as desirable.
Opposite-Type Amplifier Compensates Common-Mode
A solution to the common-mode problem is to use two CMOS differential amplifiers that are logically inverses. One of the amplifiers uses n-channel differential transistors while the other uses p-channel differential transistors. See U.S. Pat. No. 5,963,053 by Manohar et al., and assigned to Pericom Semiconductor Corp. of San Jose, Calif.
The differential amplifier using the differential p-channel transistors does not turn off for low input voltages. The differential p-channel amplifier instead turns off for high input voltages. The second differential amplifier using differential p-channel transistors can be used in parallel with the differential n-channel amplifier. The differential p-channel amplifier operates for extremely low input voltages while the differential n-channel amplifier operates for high input voltages. Both amplifiers operate for mid-range input voltages, increasing performance and sensitivity for these intermediate input voltages.
FIG. 1
is a schematic diagram of a prior-art complementary-amplifier receiver. N-type amplifier
50
uses n-channel differential transistors, while p-type amplifier
60
uses p-channel differential transistors. The RX+ and RX− inputs are coupled to the gates of n-channel differential transistors
56
,
58
in n-type amplifier
50
, and to the gates of p-channel differential transistors
66
,
68
in p-type amplifier
60
.
Current-mirror transistors
52
,
54
are p-channel transistors in n-type amplifier
50
, but current-mirror transistors
62
,
64
are n-channel transistors in p-type amplifier
60
. Node
53
is a bias voltage set by the drain of differential transistor
56
. The bias voltage of node
53
controls the current through p-channel transistors
52
,
54
, and the tail current through n-channel tail transistor
59
. This bias voltage depends on the input voltages applied to RX+ and RX−, and the sizes of all devices including transistors
52
,
56
,
59
.
The gate-bias of node
63
in p-type amplifier
60
is set in a similar but inverted way. The bias voltage is set by the drain of differential p-channel transistor
66
. The bias voltage of node
63
controls the current through n-channel current-mirror transistors
62
,
64
, and the head current through p-channel tail transistor
69
. This bias voltage depends on the input voltages applied to RX+ and RX−, and the sizes of all the devices. Note that the bias voltage for p-type amplifier
60
is a different voltage than the bias for n-type amplifier
50
. These bias voltages change relative to each other as the input voltages change.
For extremely low input voltages on RX+ and RX−, n-channel differential transistors
56
,
58
can shut off, disabling n-type amplifier
50
. However, these low voltages do not turn off p-channel differential transistors
66
,
68
. P-type amplifier
60
continues to amplify the difference in inputs RX+, RX−. Thus self-biased comparator
70
continues to operate for low input voltages, resulting in a wider common-mode input range.
While such a complementary differential amplifier is useful and has a wide common-mode range, a still wider range is desired. Power-supply voltages continue to be dramatically reduced as transistor device sizes are shrunk to prevent electrical breakdown that can occur with higher voltages of even 5 volts. Portable applications also demand low power-supply voltages. With the smaller power-supply voltages, the transistor threshold voltage becomes a larger and larger portion of the available power-to-ground voltage range. Thus amplifiers that are considered wide range for a 5-volt power supply are not sufficiently wide range for 2-volt power supplies.
What is desired is a complementary differential amplifier with a wide common-mode input range. Extending the input range relative to the power-supply is desired. A high-speed yet wide-range differential amplifier is desired that uses standard CMOS processing. While self-biasing is useful, an externally-biased differential amplifier is desired.
SUMMARY OF THE INVENTION
A wide input-range amplifier has a positive differential amplifier with a differential pair of transistors of a positive type of transistor that receive a differential input. A tail transistor of the positive type is coupled to receive current from both of the differential pair of transistors.
Load resistors are each coupled to receive current from a different one of the differential pair of transistors. Intermediate mirror transistors of a negative type each have a gate coupled to a node between a load resistor and one of the differential pair of transistors. Inverse mirror transistors of the positive type each are coupled to receive current from one of the intermediate mirror transistors. They have gates connected together and to a back node between one of the intermediate mirror transistors and one of the inverse mirror transistors.
An intermediate output is a front node between one of the intermediate mirror transistors and one of the inverse mirror transistors. The front node is not connected to the back node.
A negative differential amplifier has a differential pair of transistors of a negative type of transistor that also receive the differential input. A tail transistor of the negative type is coupled to receive current from both of the differential pair of transistors.
Load resistors are each coupled to receive current from a different one of the differential pair of transistors. Intermediate mirror transistors, of a positive type, each have a gate coupled to a node between a load resistor and one of the differential pair of transistors. Inverse mirror transistors, of the negative type, are each coupled to receive current from one of the intermediate mirror transistors. They have gates connected together and to a back node between one of the intermediate mirror transistors and one of the inverse mirror transistors.
An intermediate output is a front node between one of the intermediate mirror transistors and one of the inverse mirror transistors. The front node is not connected to the back node. Thus the positive and the negative d
Kwong David
Wu Ke
Auvinen Stuart T.
Pericom Semiconductor Corp.
Tran Toan
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