Complementary current mode driver for high speed data...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S053000, C323S315000, C330S257000

Reexamination Certificate

active

06348817

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to data communications between electronic devices and particularly, but not by way of limitation, to a complementary current mode driver for high speed data communications.
BACKGROUND
Modem electronic devices such as computers, computer peripherals, network interfaces devices, cameras, communication equipment, audio and video devices, typically include integrated circuits that communicate at high data speeds with each other, and with integrated circuits located in other electronic devices. Such high speed data communication is essential for these electronic devices to provide useful functions to their users. Such integrated circuits often include an output driver circuit for transmitting data via one or more electrical conductors to a receiving circuit that is located on the same integrated circuit, on a different integrated circuit within the same electronic device, or on a different integrated circuit within a different electronic device.
A typical driver is implemented as a “push/pull” voltage mode amplifier having pullup and pulldown transistors controlled by one or more control signals. The pullup and pulldown transistors drive an electrical conductor (referred to as the load conductor), which communicates the signal to a receiver, into binary high and low logic voltage states, respectively. The pullup transistor sources a current to the load conductor, which drives its voltage toward the positive power supply voltage. The pulldown transistor sinks a current from the load conductor, which drives its voltage toward the negative power supply (or ground) voltage.
A push/pull voltage mode driver typically presents several problems for high speed data communications. For example, the pullup and pulldown transistors may have poor high frequency transconductance gain characteristics, so that their voltage gain begins to diminish at frequencies exceeding approximately 50 MHz, thereby limiting its high speed performance. Also, in a typical voltage mode driver, not all of the pullup and pulldown currents are delivered to the load conductor. For example, when driving the load conductor while in transition toward a binary high logic state, a portion of the pullup current is delivered to the load conductor, but another portion of the pullup current (i.e., spikethrough current) is sunk by the pulldown transistor. Similarly, when driving the load conductor while in transition toward a binary low logic state, a portion of the pulldown current is received from the load conductor, but another portion of the pulldown current (i.e., spikethrough current) is received from the pullup transistor. Spikethrough current increases the power consumption required to perform the switching.
Another problem with the traditional push/pull voltage mode amplifier is that the current required to drive a load to a particular voltage is inversely proportional to the load impedance. As a result, low impedance loads require increased power consumption. Because high speed data communications often involve a high dc current swing on the load conductor, however, the push/pull voltage mode driver provides poor matching of steady-state current in the binary high logic state to the steady-state current in the binary low logic state, particularly when an output common mode voltage is drastically increased or decreased. It would be desirable to have a consistent current consumption, which, in turn, would provide a consistent power consumption, when driving different loads. For these reasons, and for other reasons that will become apparent on reading this document and viewing the accompanying drawings that form a part thereof, there is a need for improved drivers for high speed data communications that offer improvements over such limitations.
SUMMARY
This document describes, among other things, a current-steering integrated circuit driver adapted for high speed data communications. The driver offers, among other things, a high data communication speed, a large common mode output voltage range, avoidance of spikethrough current that increases power consumption, improved switching switching speed using current-steering techniques, and improved matching of steady-state output current in the high logic state to that of the low logic state, even with large output common mode voltage swing.
In one embodiment, the integrated circuit driver includes a first current regulating circuit, adjusting a current delivered to a first current output based on a signal received at a first input. A first current mirror circuit provides a first output current to a first driver output based on a current received from the first current output of the first current regulating circuit. A second current regulating circuit adjusts a current delivered to a second current output based on a signal received at a second input. A second current mirror circuit provides a second output current to the first driver output based on a current received from the second current output of the second current regulating circuit.
In another embodiment, the integrated circuit driver includes a first current regulating circuit, steering a first input current to first and second current outputs based on signals received at first and second inputs. A first current mirror circuit provides a first output current to a first driver output based on a current received from the first current output. A second current mirror circuit provides a second output current to a second driver output based on a current received from the second current output. A second current regulating circuit steers a second input current to third and fourth current outputs based on signals received at third and fourth inputs. A third current mirror circuit provides a third output current to the first driver output based on a current received from the third current output of the second current steering circuit. A fourth current mirror circuit provides a fourth output current to the second driver output based on a current received from the fourth current output of the second current steering circuit. Other aspects of the invention will be apparent on reading the following detailed description of the invention and viewing the drawings that form a part thereof.


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Fiedler, A., et al., “A 1.0625Gbps Transceiver with 2x-Pversampling and Transmit Signal Pre-Emphasis”, ISSCC97/Session 15./Serial Data Communications/Paper FP 15.1, IEEE Solid State Circuit Conference, 238-239, (1997).

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