Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1986-04-22
1987-11-03
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307454, 307500, 307254, H03K 19082, H03K 19094
Patent
active
047045442
ABSTRACT:
A new logic circuit construction in which gates are formed by appropriate interconnections of complementary current-mirror cells. With a signal applied, the resulting logic circuit draws a current drain which rises with power supply voltage, as does the speed of the circuit. With no signal the current drain of the circuit is small. Clocked circuits using this logic can use one clock line. With three states available in the clock line, a non-overlapping two-phase clock is automatically obtained with a simple oscillating signal. This logic circuit is also capable of providing a weighted input or output, enabling threshold logic ("multiple-valued logic") to be performed.
REFERENCES:
patent: 4287435 (1981-09-01), Cavaliere et al.
patent: 4380710 (1983-04-01), Cohen et al.
patent: 4433258 (1984-02-01), Kaneko et al.
patent: 4543499 (1985-09-01), Kaneko et al.
patent: 4626710 (1986-12-01), Wiedmann
patent: 4629913 (1986-12-01), Lechner
Berger et al., "Transistor-Transistor Logic Circuit", IBM T.D.B., vol. 16, No. 8, Jan. 1974, p. 2643.
Farley et al., "Totem-Pole Logic", IBM T.D.B., vol. 20, No. 9, Feb. 1978, pp. 3466-3467.
IEEE Journal of Solid-State Circuits, vol. SC-12, No. 5, Oct. 1977 "Threshold 12L and its Applications to Binary Symmetric Functions and Multivalued Logic" by T. Tich Dao, pp. 463-472.
IEEE Journal of Solid-State Circuits, vol. SC-7, No. 5, Oct. 1972 "Integrated Injection Logic: A New Approach to LSI" by Kees Hart and Arie Slob, pp. 346-351.
McGraw-Hill Book Co., Taipei, Taiwan, "VLSI Technology" by S. M. Sze, pp. 445-505.
Proceedings of the IEEE, vol. 70, No. 5, May 1982 "A Comparison of Semiconductor Devices for High-Speed Logic by Paul M. Solomon, pp. 489-345.
IEEE Transactions on Computers, vol. c-33, No. 12, Dec. 1984, "Multiple-Valued Logic--Its Status and Its Future by Stanley L. Hurst, pp. 1160-1179.
IBM Journal-Jul. 1957, "Two Collector Transistor for Binary Full Addition, by R. F. Rutz, pp. 212-222.
IEEE Journal of Solid-State Circuits, vol. sc-7, No. 5, Oct. 1972 "A New Complementary Bipolar Transistor Structure", by Stephen C. Su and James D. Meindl, pp. 351-647.
IEEE Journal of Solid-State Circuits, vol. SC-11, No. 5, Oct. 1972 "Folded-Collector Integrated Injection Logic, by Mohamed I. Elmasry, pp. 644-647.
IEEE Journal of Solid-State Circuits, vol. SC-7, No. 5, Oct. "Merged-Transistor Logic (MTL)--A Low Cost Bipolar Logic Concept by Horst H. Berger and Siegfried K. Wiedmann.
Hudspeth D. R.
Miller Stanley D.
Unisearch Limited
LandOfFree
Complementary current mirror logic does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Complementary current mirror logic, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Complementary current mirror logic will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1675636