Complementary CMOS differential amplifier circuit

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S257000

Reexamination Certificate

active

06236269

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to differential amplifier circuits, and in particular, to differential amplifier circuits implemented with complementary metal oxide semiconductor (CMOS) transistors in compact circuit structures which require no input signal terminal biasing while also providing substantially symmetrical dynamic input signal range.
2. Description of the Related Art
Referring to
FIG. 1
, conventional CMOS differential amplifiers typically use a stacked, or telescopic circuit structure in which multiple CMOS transistors are connected in series between the power supply terminals VDD, VSS/GND. The upper NMOS transistors M
1
, M
2
are biased with a predetermined bias voltage Vbias to establish current flow and a nominal voltage potential for the terminal providing the output voltage Vout. The complementary PMOS transistors M
3
, M
4
and NMOS transistors M
5
, M
6
are biased at their drain terminals with a selected DC bias to establish the nominal center potential for the complementary phases Ip, Im of the differential input signal Ip-Im. A tail current transistor M
7
, biased by another bias voltage Vtail, establishes the tail current shared by the two circuit branches.
This conventional design has several disadvantages. One is that the input circuitry requires a DC bias to ensure that the differential input signal components are properly centered for maximum dynamic input signal range. Another is that the telescopic arrangement of the individual transistors causes the circuit to be more sensitive to temperature variations due to the resultant increased overall temperature coefficient. Additionally, particularly due to the various biasing potentials required, this circuit is very sensitive to variations in the power supply potential VDD-VSS/GND.
SUMMARY OF THE INVENTION
A complementary metal oxide semiconductor (CMOS) differential amplifier circuit in accordance with a preferred embodiment of the present invention uses complementary CMOS differential amplifier circuits connected in parallel at the differential input to generate a push-pull output signal with a charge pump circuit. The NMOS and PMOS input stages drive dual PMOS and NMOS current mirror circuits, respectively. One of each of the dual PMOS and NMOS current mirror circuits are used together to form the output charge pump circuit, while the remaining PMOS and NMOS current mirror circuits are cross-connected to provide PMOS-origin and NMOS-origin input currents to the output NMOS and PMOS current mirror circuits, respectively. Each of the circuit branches has an equal number of CMOS transistors connected between the power supply terminals. This complementary circuit structure provides numerous advantages: inherent compensation for NMOS and PMOS temperature coefficients; compact circuit structure between the power supply terminals; avoidance of cascode circuitry; and good slew rate since the NMOS and PMOS devices provide complementary strengths in terms of their respective current drive capabilities.
In accordance with one embodiment of the present invention, a complementary metal oxide semiconductor (CMOS) differential amplifier circuit includes power supply terminals, input signal terminals, an output signal terminal and a plurality of complementary CMOS differential amplifier circuits. The input signal terminals are configured to convey a differential input signal and the output signal terminal is configured to convey an output signal. The plurality of complementary CMOS differential amplifier circuits, coupled between the power supply terminals and the output signal terminal and coupled in parallel to the input signal terminals, is configured to receive the differential input signal and in accordance therewith provide the output signal. The plurality of complementary CMOS differential amplifier circuits forms a plurality of circuit branches and each one of the plurality of circuit branches includes an equal number of CMOS transistors coupled between the power supply terminals.
In accordance with another embodiment of the present invention, a complementary metal oxide semiconductor (CMOS) differential amplifier circuit includes power supply terminals, input signal terminals, an output signal terminal, and differential amplifier circuits. The input signal terminals are configured to convey a differential input signal and the output signal terminal is configured to convey an output signal. One differential amplifier circuit is configured to receive the differential input signal and in accordance therewith provide a portion of the output signal, and includes an NMOS input stage coupled between the input signal terminals and a PMOS output stage coupled between the NMOS input stage and the output signal terminal. Another differential amplifier circuit is configured to receive the differential input signal and in accordance therewith provide another portion of the output signal, and includes a PMOS input stage coupled between the first and second input signal terminals and an NMOS output stage coupled between the PMOS input stage and the output signal terminal.
In accordance with still another embodiment of the present invention, a complementary metal oxide semiconductor (CMOS) differential amplifier circuit includes:
first and second power supply means for conveying electrical power;
first and second input signal means for conveying a differential input signal;
output signal means for conveying an output signal; and
a plurality of complementary CMOS differential amplifier means, coupled between the first and second power supply means and the output signal means and coupled in parallel to the first and second input signal means, for receiving the differential input signal and in accordance therewith providing the output signal;
wherein the plurality of complementary CMOS differential amplifier means forms a plurality of circuit branches and each one of the plurality of circuit branches includes an equal number of CMOS transistors coupled between the first and second power supply means.
In accordance with yet another embodiment of the present invention, a complementary metal oxide semiconductor (CMOS) differential amplifier circuit includes:
first and second power supply means for conveying electrical power;
first and second input signal means for conveying a differential input signal;
output signal means for conveying an output signal;
first differential amplifier means for receiving the differential input signal and in accordance therewith providing a portion of the output signal and including
NMOS input means coupled between the first and second input signal means, and
PMOS output means coupled between the NMOS input means and
the output signal means; and
second differential amplifier means for receiving the differential input signal and in accordance therewith providing another portion of the output signal and including
PMOS input means coupled between the first and second input signal means, and
NMOS output means coupled between the PMOS input means and
the output signal means.
These and other features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings.


REFERENCES:
patent: 4797631 (1989-01-01), Hsu et al.
patent: 5631607 (1997-05-01), Huijsing et al.
patent: 5714906 (1998-02-01), Motamed et al.
patent: 5894245 (1999-04-01), Cho
patent: 5907259 (1999-05-01), Yamada et al.

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