Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including high voltage or high power devices isolated from...
Reexamination Certificate
2005-09-13
2005-09-13
Pham, Hoai (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including high voltage or high power devices isolated from...
C257S505000, C257S506000, C257S510000
Reexamination Certificate
active
06943426
ABSTRACT:
A semiconductor substrate includes a pair of trenches filled with a dielectric material. Dopant introduced into the mesa between the trenches is limited from diffusing laterally when the substrate is subjected to thermal processing. Therefore, semiconductor devices can be spaced more closely together on the substrate, and the packing density of the devices can be increased. Also trench constrained doped region diffuse faster and deeper than unconstrained diffusions, thereby reducing the time and temperature needed to complete a desired depth diffusion. The technique may be used for semiconductor devices such as bipolar transistors as well as isolation regions that electrically isolate the devices from each other. In one group of embodiments, a buried layer is formed at an interface between an epitaxial layer and a substrate, at a location generally below the dopant in the mesa. When the substrate is subjected to thermal processing, the buried layer diffuses upward, the dopant in the mesa diffuses downward until the two dopants merge to form an isolation region or a sinker extending downward from the surface of the epitaxial layer to the buried layer. In another embodiment, dopant is implanted between dielectrically filled trenches at a high energy up to several MeV, then diffused, combining the benefits of deep implantation and trenched constrained diffusion to achive deep diffusions with a minimal thermal budget.
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Chan Wai Tien
Cornell Michael E.
Williams Richard K.
Advanced Analogic Technologies, Inc.
Ha Nathan W.
Pham Hoai
Silicon Valley Patent & Group LLP
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