Compiling system and method for reconfigurable computing

Details Compiling system and method for reconfigurable computing Compiling system and method for reconfigurable computing

1997-04-09

1999-08-03

Voeltz, Emanuel Todd

39580001, 39580039, G06F 1518, G06F 1900

Patent

active

059336420

ABSTRACT:
A compiling system and method for generating a sequence of program instructions for use in a dynamically reconfigurable processing unit having an internal hardware organization that is selectively changeable among a plurality of hardware architectures, each hardware architecture executing instructions from a corresponding instruction set. Source files are compiled for execution using various instruction set architectures as specified by reconfiguration directives. Object files optionally encapsulate bitstreams specifying hardware architectures corresponding to instruction set architectures with executable code for execution on the architectures.

REFERENCES:
patent: 5361373 (1994-11-01), Gilson
patent: 5600845 (1997-02-01), Gilson
patent: 5675805 (1997-10-01), Boldo et al.
patent: 5848273 (1998-12-01), Fontana et al.

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