Compiling apparatus having a function to analyze overlaps of mem

Boots – shoes – and leggings

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364280, 3642804, 3642805, 364DIG1, G06F 944

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055817629

ABSTRACT:
An object of the present invention is to realize a compiling apparatus producing an object program which can be executed at a high speed. In a compiling apparatus according to the present invention, an aliasing address comparison instruction generating unit inserts a instruction to compare the two memory addresses of each pair of data expressions whose overlap is judged to be obscure, generates a plurality of paths defined by combinations of conditions whether or not memory addresses of data expressions of each pair overlap, and generates a instruction to branch to one of the paths according to a comparison result obtained by the instruction in an execution of a compiled program, and an optimization unit for respectively optimizing the paths. When the object program is executed, one path corresponding to a practical condition is selected from the plurality of paths, and only the selected path is executed.

REFERENCES:
"Hybrid Incremental Alias Algorithms", Thomas J. Marlowe, et al., System Sciences, 1991 Annual Hawaii Int'l. Conference. IEEE Publications.
"A New Kind of Memory for Referencing Arrays and Pointers" Henry Dietz, et al., Supercomputing '88, IEEE Publication.
Aho et al., "10.8 Dealing With Aliases", Compilers: Principles, Techniques, and Tools, Addison-Wesley, Reading, MA, 1986.
Horowitz et al., "Dependence Analysis for Pointer Variables", Proceedings of the ACM Sigplan Symposium on Compiler Construction, Jun. 1989, pp. 28-40.
Landi et al., "A Safe Approximate Algorithm for Interprocedural Pointer Aliasing", Proceedings of the ACM Sigplan '92 Conference on Programming Language Design and Implementation, 1992, pp. 235-248.

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