Compiler for optimization in generating instruction sequence and

Data processing: software development – installation – and managem – Software program development tool – Translation of code

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717 5, 717 9, 717 8, 712 22, 712241, 712300, 711201, G06F 945

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061136506

ABSTRACT:
A compiler has optimization processing part which comprise a loop normalization processing part for normalizing a loop structure in an intermediate language program, a subscript expression analyzing part for analyzing the presence or not of non-aligned access in the normalized loop structure, an SIMD instruction converting part for modifying an intermediate code so to perform computing of the array elements by using an SIMD instruction sequence, and a non-aligned access processing part for recognizing parts which are not word-aligned access in the array elements on a main storage subjected to the SIMD computing and converting a part of the non-aligned access into a combination of wored-aligned access instructions and shift instructions with logical instructions.

REFERENCES:
patent: 5274818 (1993-12-01), Vasilevsky et al.
patent: 5475842 (1995-12-01), Gilbert et al.
patent: 5649179 (1997-07-01), Steenstra
patent: 5696956 (1997-12-01), Razdan et al.
patent: 5704053 (1997-12-01), Santhanam
patent: 5819064 (1998-10-01), Razdan
patent: 5889985 (1999-03-01), Babaian et al.
patent: 5958048 (1999-09-01), Babaian et al.
patent: 5995122 (1999-11-01), Hsieh et al.
Al-Mouhamed et al., "A compiler transformation to improve memory assess time in SIMD systems", Proc. of Parallel Architectures and Compilation Techniques, IEEE, Oct 1966, pp. 174-178.
Hensgen et al., MINTABS: Early experiences witha new paradigm for programming SIMD computers, Proc. on Distributed Computing Systems, IEEE, 1992, pp. 110-117.
Yoshida et al., "A Data-localization Scheme using task-fusion for macro-dataflow computation", Proc on Comm., computers and Signal Processing, IEEE, 1995, pp. 135-140.
Garza-Salazar et al., "Reducing communication by honoring multiple alignments", Proc of the INtl Conf on Supercomputing, ACM, pp. 87-96.
Weiss, "Mining on SIMD architectures", Proc. of the Intl. Conf. on Supercomputing, ACM, 1991, page 234.
Philippsen, "Automatic alignment of array data and processes to reduce comminication time on DMPPs", ACM SIGPLAN, 1995, pp. 156-165.
Pugh, "Uniform techniques for Loop Optimization", Proc. Supercomputing, ACM, 1991, pp. 25.
Gupta et al., "PARADIGM: Acompiler for automatic data distribution on multicomputers", Proc. on Supercomputing, 1993, ACM, pp. 87.
Aho et al., "Compilers Principles, Techniques, and Tools" Addison-Wesley Publishing Company pp.513-722 (1985).
Zima et al., "Supercompilers for Parallel and Vector Comuters" Addison-Wesley Publishing Company pp. 112-172 (1991).

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