Compiler apparatus

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S151000, C717S156000, C717S161000

Reexamination Certificate

active

07856629

ABSTRACT:
A compiler apparatus, which can perform software pipelining optimization that has a considerable effect of reducing the number of execution cycles taken to complete a loop process, converts a source program into a machine program for a processor which is capable of parallel processing. The compiler apparatus is composed of: a parsing unit operable to parse the source program and then to convert the source program into an intermediate program which is described in an intermediate language; an optimization unit operable to optimize the intermediate program; and a conversion unit operable to convert the optimized intermediate program into the machine language program, wherein the optimization unit is operable to execute software pipelining, by inserting a transfer instruction, which is used for transferring data between operands, into a loop process included in the intermediate program so that a data dependence relation is changed.

REFERENCES:
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patent: 5950007 (1999-09-01), Nishiyama et al.
patent: 6016399 (2000-01-01), Chang
patent: 6113650 (2000-09-01), Sakai
patent: 6760906 (2004-07-01), Odani et al.
patent: 6941541 (2005-09-01), Snider
patent: 7010787 (2006-03-01), Sakai
patent: 7523448 (2009-04-01), Kawahito
patent: 2002/0133813 (2002-09-01), Ostanevich
patent: 2004/0163053 (2004-08-01), Snider
patent: 2004/0194071 (2004-09-01), Tanaka
patent: 2004/0268334 (2004-12-01), Muthukumar et al.
patent: 2006/0107267 (2006-05-01), Miyachi et al.
patent: 10-097423 (1998-04-01), None
English language Abstract of JP 10-097423.

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