Amplifiers – With semiconductor amplifying device – Including push-pull amplifier
Reexamination Certificate
2002-05-22
2003-03-25
Nguyen, Patricia (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including push-pull amplifier
C330S263000, C330S267000, C330S292000
Reexamination Certificate
active
06538514
ABSTRACT:
BACKGROUND
1. Technical Field
The present invention relates to class-G amplifiers. More particularly, the present invention relates to a compensation technique for a class-G amplifier that stabilizes frequency responses and greatly reduces the transient created by traversing the switching points between a low power supply and a high power supply.
2. Related Art
Class-G amplifiers operate to change the power supply voltage from a lower level to a higher level when larger output swings are required. Class-G operation is often implemented with a single class-AB output stage that is connected to two power supply rails by a diode, or a transistor switch. The design is such that the output stage is connected to the lower supply voltage, and automatically switches to the higher power supply rails for large signal peaks. Another approach involves the use of two class-AB output stages, each connected to a different power supply voltage, with the magnitude of the input signal determining the signal path. Using two power supplies improves efficiency enough to allow significantly more power for a given size and weight.
FIG. 1
shows a schematic diagram of a typical class-G current feedback amplifier. The input stage of the amplifier of
FIG. 1
includes transistors
2
,
4
,
6
, and
8
, and current sinks
10
and
12
. The collector terminals of transistors
2
and
4
are connected directly to an upper high voltage power supply terminal Vsph and a lower high voltage power supply terminal Vsmh, respectively. The emitter terminal of transistor
2
is connected through a current sink
12
to Vsmh, while the emitter terminal of transistor
4
is connected through a current sink
10
to Vsph. The base terminals of transistors
2
and
4
are connected together and form the non-inverting input (+input) of the class-G amplifier. Transistor
6
has a collector terminal connected to the input of a pull-up current mirror
18
, an emitter forming the inverting input (−input) of the class-G amplifier, and a base terminal connected to the emitter terminal of transistor
4
. Transistor
8
is connected in an emitter follower configuration with transistor
6
, with a collector terminal connected to pull-down current mirror
20
, and a base terminal connected to the emitter terminal of transistor
2
.
The output stage of the class-G amplifier of
FIG. 1
includes current mirrors
18
and
20
, transistors
30
,
32
,
34
, and
36
, diodes
14
,
16
,
38
and
40
, and voltage supplies
26
and
28
. The collector of transistor
30
is connected to Vsph, while the collector of transistor
36
is connected to Vsmh. The emitters of transistors
30
and
36
are connected to the collector terminals of common emitter transistors
32
and
34
, respectively. The base of transistor
30
is connected through the voltage supply
26
to the output of the class-G amplifier, while the base of transistor
36
is connected through a voltage supply
28
to the output of the class-G amplifier. Transistor
32
has a base connected to the output of pull-up current mirror
18
, while the base of transistor
34
is connected to the output of pull-down current mirror
20
. A first low voltage power supply Vsp
1
is connected through diode
38
to the collector of transistor
32
at node p, while a second low voltage power supply Vsm
1
is through diode
40
to the collector of transistor
34
at node m. Capacitors
22
(CBCp) and
24
(CBCm) represent the parasitic capacitance that loads the terminals of diodes
14
and
16
. A feedback resistor
42
is typically connected from the output of the class-G amplifier to the inverting input (−input).
The amplifier of
FIG. 1
operates as a class-G amplifier in that the collector voltages of transistors
32
and
34
are provided by one of transistor
30
and diode
38
, or one of transistor
36
and diode
40
, respectively. That is for small output voltages the diodes
38
and
40
are forward biased and load current flows through diode
38
or
40
, and transistors
30
and
36
are biased off. When the output voltage exceeds Vsp
1
+VBE−VD−V
Bp
for positive swing (where VBE is the base to emitter voltage of transistor
30
, VD is the diode voltage for diode
38
, and V
Bp
is the voltage supply
26
voltage) or −Vsm
1
+VBE+VD+V
Bm
for negative swings (where VBE is the base to emitter voltage of transistor
34
, VD is the diode voltage for diode
40
, and V
Bm
is the voltage supply
28
voltage), transistor
30
or
36
will turn on and divert output current from one of the low voltage supplies VspL or Vsm
1
toward one of the high voltage supplies Vsph or Vsmh. Thus, small signals at the output will cause current to be drawn from the low supplies. In the case of Digital Subscriber Line (DSL) waveforms, only 1-3% of signal swings will draw power from the high supplies, and overall power consumption is minimized.
At low output levels, the dominant compensation pole for the amplifier of
FIG. 1
is at 1/(2 R
F
*(CBCP+CBCm)), where R
F
is the value of feedback resistor
42
. The voltage at the collectors of transistors
32
and
34
does not move much with small outputs, so capacitors
22
(CBCp) and
24
(CBCm) load the “gain node” between the terminals of diodes
14
and
16
. When large outputs occur, however, transistors
30
and
36
drive the collectors of transistors
32
and
34
. For large positive outputs, for instance, transistor
30
provides a voltage at the collector of transistor
32
that follows the output. Thus, capacitor
22
is now driven with similarly changing voltages at both terminals and draws almost no AC current. Capacitor
22
therefore no longer adds its capacitance as compensation in the above equation. The fed-back pole is moved upward in frequency. A similar operation occurs with large negative outputs. With a large negative output, transistor
36
provides a voltage at the collector of transistor
34
that follows the output. Thus, capacitor
24
is now driven with similarly changing voltages at both terminals and draws almost no AC current. Capacitor
24
therefore no longer adds its capacitance as compensation.
Unfortunately, at the higher pole frequency additional phase lag exists in the current mirrors and all other transistors, and the circuit is more likely to oscillate. Additionally, a sudden change in frequency response occurs in this supply crossover region, causing a transient response with each traversal of the region. This leads to higher output distortion.
SUMMARY
In accordance with the present invention, referring to
FIG. 2
, an improved Class-G amplifier is provided by adding a first capacitor
82
between the input of current mirror
18
and node p, and by adding a second capacitor
84
between the input of current mirror
20
and node m. The added capacitors
82
and
84
can be sized to stabilize frequency responses when high power supplies are enabled. The added capacitors
82
and
84
further function to reduce transient currents during switching through the crossover points between upper and lower power supplies.
REFERENCES:
patent: 3887878 (1975-06-01), Schade, Jr.
patent: 4205273 (1980-05-01), Yoshida
patent: 4688001 (1987-08-01), Dijkmans et al.
patent: 4706039 (1987-11-01), Dijkmans et al.
patent: 5315266 (1994-05-01), Lorenz
patent: 5859568 (1999-01-01), Le et al.
patent: 6184750 (2001-02-01), Somerville
patent: 6236273 (2001-05-01), Lewyn
Elantec Semiconductor Inc.
Fliesler Dubb Meyer & Lovejoy LLP
Nguyen Patricia
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