Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Compensation for variations in external physical values
Reexamination Certificate
1999-10-08
2001-10-16
Ton, My-Trang Nu (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Compensation for variations in external physical values
C327S427000
Reexamination Certificate
active
06304129
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field of the Invention
The present invention relates to a compensation circuit for a power transistor, and particularly to a compensation circuit for biasing a power transistor to offset unwanted variations in the operating characteristics thereof.
2. Background of the Invention
Power transistors have been utilized for years in providing relatively sizeable current levels for applications in a number of markets, such as audio, video, consumer, multi-media and wireless communications. Concerning wireless communications, power transistors are commonly used in amplification stages for radio base station amplifiers and other radio frequency (RF) applications. Such transistors, when used for power amplification at high frequencies, need to meet numerous detailed requirements for output power, gain, robustness, efficiency, stability, bandwidth, etc., at a specified supply voltage and operating frequency.
At least one type of power transistor utilized in power applications is a field effect transistor and particularly a MOS transistor. Like the performance of most all transistors, the operating characteristics of MOS power transistors are affected by a number of conditions and/or phenomenon. Temperature and process variations may cause changes in the operating characteristics of a power transistor. In addition, MOS transistors, such as lateral diffused MOS (LDMOS) transistors, may exhibit gate oxide charging over time. Specifically, electrons in the channel region of a MOS transistor can be accelerated by the source-drain electric field, surmount the channel region-gate oxide interfacial barrier and become trapped in the gate oxide region of the MOS transistor. The trapped electrons in the gate oxide region change the device characteristics of the MOS transistor, including shifting the threshold voltage thereof. For an enhancement mode MOS transistor, the threshold voltage increases as the number of charges in the gate oxide region increases. This shift in the threshold voltage of a MOS transistor may cause a dramatic change in the quiescent current level thereof. A change in the quiescent current level effects the overall linearity performance and small signal gain of the MOS transistor. As can be seen, there is a need to account for changes in the performance of MOS transistors caused by any of a number of phenomenon.
SUMMARY OF THE INVENTION
The present invention overcomes the shortcomings in prior circuits and systems and thereby satisfies a significant need for a bias circuit for a power transistor which compensates for one or more changes in the operating characteristics of the power transistor while biasing the power transistor. The bias circuit biases the gate terminal of the power transistor so that the power transistor performs as intended. The bias circuit includes a correction transistor which has a similar device structure to the device structure of the power transistor. The correction transistor may be fabricated on the same semiconductor substrate as the power transistor or on a semiconductor substrate that is subjected to the same semiconductor fabrication techniques as the semiconductor substrate in which the power transistor is formed. The correction transistor is biased in a manner that is similar to the biasing of the power transistor. As a result, the operating characteristics of the correction transistor substantially mirror the operating characteristics of the power transistor. By making the output bias voltage of the bias circuit a function of the operating characteristics of the correction transistor, the output bias voltage applied to the power transistor provides a correction to offset unwanted variations in the operating characteristics of the power transistor.
A preferred embodiment of the present invention includes an operational amplifier. An input terminal of the operational amplifier is coupled to the output terminal of the correction transistor. The output of the operational amplifier is coupled to the control terminal of the power transistor. In this way, changes in the operating characteristics of the correction transistor (which mirror the operating characteristics of the power transistor) alters the input of the operational amplifier so that the output signal thereof that is applied to the control terminal of the power transistor compensates for the changes in the operating characteristics of the power transistor. In other words, the voltage appearing on the control terminal of the power transistor is changed to offset undesirable changes in the operating characteristics of the power transistor.
REFERENCES:
patent: 5164679 (1992-11-01), Dittmer
patent: 5214315 (1993-05-01), Dunnam
patent: 5281925 (1994-01-01), Hulick
patent: 6049704 (2000-04-01), Peckham et al.
patent: 6091279 (2000-07-01), Hamparian
patent: 0 601 410 A1 (1994-06-01), None
patent: 0 625 822 A2 (1994-11-01), None
PCT, International Search Report, PCT/US00/27199, Jan. 2, 2001.
Blair Cynthia
Sjödén Henrik
Ericsson Inc.
Jenkens & Gilchrist P.C.
Nu Ton My-Trang
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