Compensating for variations in memory cell programmed state...

Details Compensating for variations in memory cell programmed state... Compensating for variations in memory cell programmed state...

2009-04-22

2010-11-09

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185090

Reexamination Certificate

active

07830708

ABSTRACT:
Method and apparatus for compensating for variations in memory cell programmed state distributions, such as but not limited to a non-volatile memory formed of NAND configured Flash memory cells. In accordance with various embodiments, a memory block is formed from a plurality of memory cells that are arranged into rows and columns within the memory block, each memory cell configured to have a programmed state. A selected row of the memory block is read by concurrently applying a stepped sequence of threshold voltages to each memory cell along the selected row while sequentially decoupling read current from groups of memory cells along the selected row as the programmed states of said groups of cells are successively determined.

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