Pulse or digital communications – Cable systems and components
Reexamination Certificate
1999-08-27
2002-11-19
Pham, Chi (Department: 2631)
Pulse or digital communications
Cable systems and components
Reexamination Certificate
active
06483879
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates generally to data transmission, and more particularly to a method and apparatus for compensating for initial signal interference exhibited by differential transmission lines.
A computer bus is generally a set of parallel conductors or transmission lines interconnecting two or more electrical devices for the purpose of data transfer. The SCSI bus is one popular type of interconnect bus designed for short distant data communication between computers and peripheral devices. In particular, the SCSI bus has been designed to interconnect independent devices such as disk drives, tape drives, scanners, and computers. Several SCSI versions have been developed and standardized, with newer versions being developed to keep pace with changing computer speeds and requirements. One of the newer standards is low voltage differential (LVD) SCSI, an improved version of differential SCSI.
LVD SCSI transfers data via low differential voltage signals (e.g. ±400 mV differences) which enable higher data transfer rates and longer data transfer distances than the older single-ended SCSI standards. More specifically, an LVD SCSI bus includes several differential bus line each comprising two separate bus lines or transmission lines. In general, LVD controllers transmit a binary zero over a differential bus line of the LVD SCSI bus by developing a positive voltage difference between a first bus line and a second bus line of the differential bus line. Similarly, LVD controllers transmit a binary one over a differential bus of a LVD SCSI bus by developing a possitive voltage difference between the first bus line and the second bus line of the differential bus line.
Generally, LVD SCSI bus controllers utilize either current mode LVD drivers or voltage mode LVD drivers to develop the differential voltages between the bus lines of the differential bus lines. More specifically, known LVD SCSI bus controllers with current mode LVD drivers have always transmitted binary zeros by driving the differential bus line with a first current having a first magnitude and have always transmitted binary ones by driving the differential bus line with a second current having a second magnitude. Similarly, known LVD SCSI bus controllers having voltage mode LVD drivers have always transmitted binary zeros by driving the differential bus line with a first voltage having a first magnitude, and have always transmitted binary ones by driving the differential bus line with a second voltage having a second magnitude.
While at slower transfer speeds these known LVD SCSI controllers were able to transfer data across differential bus lines without significant data loss, it has been found that significant data loss now occurs when using these known LVD drivers at the faster transfer speeds such as transfer speeds dictated by the Fast40 and Fast80 SCSI protocols. The inventor has found the reason that significant data loss occurs using the known LVD SCSI controllers is that differential voltage developed upon a differential bus line by the LVD drivers of the known LVD SCSI controllers has a diminished magnitude at the receiving devices when data is transferred across the differential bus line after the differential bus line has been at an opposite differential voltage state for a precharge time period. As a result of failing to develop a differential voltage having a sufficient magnitude at the receiving device, LVD receivers of the receiving device commonly failed to accurately receive at least the first data bit and possible more data bits following the differential data line being at the opposite differential voltage for a precharge time period.
For example, a known LVD SCSI controller may consecutively transfer a series of binary zeros across a differential bus line by driving the differential bus line to a first differential voltage state (e.g. ±400 mV) for each binary zero of the series. Then, the LVD SCSI controller may transfer a series of binary ones across the differential bus line by driving the differential bus line to a second differential voltage state (e.g. −400 mV). At slower transfer rates, LVD receivers accurately received the series of binary zeroes and the series of binary ones. However, at faster transfer rates, the LVD receivers often inaccurately received the first binary one of the series of ones at higher transfer speeds due to the differential voltage developed at the LVD receiver for the first binary one having a diminished magnitude (e.g. −300 mV). The above phenomena of a diminished differential amplitude being developed at the LVD receiver is referred to herein as initial signal interference (ISI).
A need therefore exists for a method and apparatus that compensate for initial signal interface exhibited by differential transmission lines in order to enable reliable data transfers at high transfer rates across differential transmission lines.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, there is provided a method of compensating for initial signal interference exhibited by a differential transmission line. One step of the method includes determining whether the differential transmission line has been at a first differential voltage state for at least a first predetermined time period. Another step of the method includes transmitting a first data bit across the differential transmission line by driving the differential transmission line from the first differential voltage state to a second differential voltage state with a first current having a first magnitude if the determining step determines that the differential transmission line has not been at the first differential voltage state for at least the first predetermined time period. Yet another step of the method includes transmitting the first data bit upon the differential transmission line by driving the differential transmission line from the first differential voltage state to the second differential voltage state with a second current having a second magnitude that is larger than the first magnitude if the determining step determines that the differential transmission line has been at the first differential voltage state for at least the first predetermined time period.
Pursuant to another embodiment of the present invention, there is provided a method of compensating for initial signal interference exhibited by a differential transmission line. The method includes the step of determining whether the differential transmission line has been at a first differential voltage state for at least a first predetermined time period. The method also includes the step of transmitting a first data bit across the differential transmission line by impressing a first differential voltage having a first magnitude upon the differential voltage line in order to drive the differential transmission line from the first differential voltage state to a second differential voltage state if the determining step determines that the differential transmission line has not been at the first differential voltage state for at least the first predetermined time period. Another step of the method includes transmitting the first data bit upon the differential transmission line by impressing upon the differential voltage line a second differential voltage having a second magnitude larger than the first magnitude in order to drive the differential transmission line from the first differential voltage state to a second differential voltage state if the determining step determines that the differential transmission line has been at the first differential voltage state for at least the first predetermined time period.
Pursuant to another embodiment of the present invention, there is provided a differential bus controller that compensates for initial signal interface associated with data transfers across a differential bus comprising differential bus lines. The differential bus controller includes a controller and differential drivers. The controller is coupled to the d
Burd Kevin M
Maginot, Moore & Bowman LLP
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