Compensating arrangement for a load voltage, synchronously distu

Details Compensating arrangement for a load voltage, synchronously distu Compensating arrangement for a load voltage, synchronously distu

1990-08-29

1992-08-25

Stephan, Steven L.

Electricity: power supply or regulation systems

Output level responsive

323266, 363 26, G05F 110

Patent

active

051422166

ABSTRACT:
In a compensating arrangement for a disturbed load voltage (V.sub.2, FIG. 3) of a remotely located load (20), the load voltage is fed back and combined with the voltage (E.sub.osc) of an oscillator (10A) to form an error signal (E.sub.X). The error signal is stored for a period less than one cycle of E.sub.osc by a selected period (T) and combined with the oscillator voltage (E.sub.osc) to be amplified and produce a modified output voltage (V.sub.O). The latter, when fed to the load through a distribution system (15) results in the waveform of the load voltage (V.sub.L) being substantially identical to that of the oscillator voltage (E.sub.osc).

REFERENCES:
patent: 3602802 (1971-08-01), Chan
patent: 4251857 (1981-02-01), Shelly
patent: 4293904 (1981-10-01), Brooks et al.
patent: 4551668 (1985-11-01), Kammiller
patent: 4603288 (1986-07-01), Rogers

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