Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se
Reexamination Certificate
2000-03-21
2002-10-29
Sherry, Michael J. (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
C324S537000, C702S058000
Reexamination Certificate
active
06472860
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates, in general, to RF power detectors used in power control circuits and, in particular, to a method and apparatus for preventing power amplifier saturation.
BACKGROUND OF THE INVENTION
A wireless communication system, for example, a Global System for Mobile (GSM) system is a standardized system established by the European Telecommunication Standards Institute (ETSI) that defines a common method of communication between a mobile telephone (mobile station) and a base station. The GSM system uses a Time Division Multiple Accessing (TDMA) signaling mode to utilize the available channel frequencies. The TDMA signaling mode defines a carrier frequency comprising eight TDMA channels having eight time slots with each time slot allocated to one mobile station within a geographic area. Each TDMA channel has a time duration of 4.615 ms and each timeslot has a duration of 577 &mgr;s. Each time slot carries either speech or control data in a burst form.
The wireless communication system may use an Amplitude Modulation (AM) scheme to modulate the carrier frequency with information. The wireless communication system uses a transmitter to transmit the modulated RF signals and a power amplifier to linearly amplify the modulated RF signal to be transmitted. The amplifier is required to ramp up to a specific power level, transmit the signal containing information, and to ramp down to a specified power level in the defined amount of time in order to avoid interference with an adjacent time slot.
Power amplifiers are biased to operate within the specified constraints with maximum efficiency and linearity. The amplifier's optimized bias point or Q-point should be defined as having a safe zone between the operating point and the 1 dB gain compression point to allow the amplifier to operate as efficiently as possible with minimum distortion. Operating conditions of the power amplifier such as extreme temperature variations affect characteristics of the power amplifier, for example, the power amplifiers 1 dB gain compression point, causing the power amplifier to operate closer to saturation with extreme temperature conditions.
Turning now to
FIG. 1
, where an exemplary prior art Power Control Loop (PCL) used in wireless communication systems, such as a GSM system, is illustrated and denoted generally as
10
. PCL
10
comprises a Power Amplifier (PA)
12
having a amplifier input and a amplifier output coupled to a RF input
14
for receiving RF input power P
i
and a RF output
16
for supplying a linearly amplified RF output power P
o
. A variable attenuator
18
disposed between RF input
14
and PA
12
comprises a input coupled to RF input
14
and a output coupled to the amplifier input. Variable attenuator
18
further comprises a control input
20
for controlling the attenuation level at RF input
14
.
PCL
10
further comprises a directional coupler
22
coupled to RF output
16
for coupling a portion, E
0
, of output power P
o
through the feedback path. PCL
10
further comprises a RF power detector
24
for rectifying and linearising coupled power E
0
. RF power detector
24
comprises a detector input coupled to directional coupler
22
and a detector output containing a detected signal V
D
. RF power detector
24
may comprise a detector circuit for rectifying the coupled power E
o
and a linearizer for logarithmically amplifying detected voltage V
D.
PCL
10
further comprises a comparator
30
having an inverting input
32
coupled to detector output containing detected voltage V
D
and a non-inverting input coupled to a supply reference terminal
34
containing a supplied reference voltage V
R
. Supplied reference voltage V
R
supplied by an external source such as a Digital Signal Processor or Applications Specific Integrated Circuit (ASIC) is a correct representation output power P
o
. Comparator
30
compares detected signal V
D
and reference signal V
R
and supplies the difference, an error signal V
E
, which is filtered through a loop filter
36
. The filtered signal, a control signal V
C
, adjusts the attenuation level correcting any deviation in output power P
o
.
Refering now to
FIG. 2
, where a schematic view of prior art RF power detector
24
is illustrated. RF power detector
24
comprises a detecting diode
50
for rectifying proportional power E
o
. Detecting diode
50
is coupled to a detector input
52
through a coupling capacitor
54
and a input matching circuit
56
. Detecting diode
50
is coupled to a detector output
58
through a lineariser
60
. RF power detector
24
further comprises detecting diode
50
coupled to detector output
58
through a lineariser
60
. RF power detector
24
further comprises a RC circuit
64
comprising a capacitor
66
coupled in series with a resistor
68
. RC circuit
64
is coupled in parallel between lineariser
60
and detecting diode
50
. RC circuit may be tuned to control the amount of detected voltage V
d
seen across RC circuit
64
.
PCL
10
uses negative feedback to control the gain of PA
12
so that PA
12
ramps up, transmits and ramps down within the specified time and with minimum distortion. Error signal V
E
is used to adjust the operating point so that output power P
o
is maintained within requirements. However, if PA
12
is operating at extreme temperatures, characteristics of PA
12
vary affecting the efficiency and linearity of the device. For example, the 1 dB gain compression decreases causing the margin between the operating point and the 1 dB gain compression point to decrease. Decreasing the margin between the operating point and the 1 dB gain compression point causes the amplifier to operate too close to saturation resulting in distortion and non-linearity which produces spectral growth.
As may be seen an improved apparatus to adjust the operating point of a RF power amplifier according to extreme temperatures could prevent RF power amplifier saturation under extreme temperature conditions.
SUMMARY OF THE INVENTION
The present invention presents an improved apparatus for preventing power amplifier saturation when used in power control circuits.
The invention provides a compensated RF power detector utilized in power control circuits for preventing power amplifier saturation. A power amplifier uses a power control circuit to maintain the power amplifier as efficiently and linearly as possible without distortion. The operating point of the power amplifier is defined as close to the 1 dB gain compression point as possible for maximum efficiency and linearity with minimum distortion. However, extreme temperature conditions affect the 1 dB gain compression point causing the power amplifier to operate too close to saturation resulting in distortion or spectral growth.
In an embodiment, the compensated RF power detector comprises a RF power detector and a variable RC circuit. The RF power detector has an RF input for receiving RF power, a detector output for supplying a compensated detected voltage and, a detecting diode for generating a detected voltage in response to the received RF power. The detecting diode has an anode coupled to the RF input and a cathode coupled to the detector output. The variable RC circuit comprises a capacitor and a control circuit. The capacitor has a first lead coupled to the cathode of the detecting diode and a second lead coupled to the control circuit. The control circuit has a control output containing a varying resistance coupled to the second lead of the capacitor. The variations in the varying resistance result in the compensation of the detected voltage.
In the embodiment, the RF power detector further comprises a coupling capacitor having a first lead coupled to the RF input and a second lead coupled to the anode of the detecting diode. The RF power detector further comprises an input matching circuit disposed between the coupling capacitor and the detecting diode and, a lineariser disposed between the PIN diode and the RF output.
In the embodiment, the control circuit further comprises a PIN diode having
Neitiniemi Jukka-pekka
Tran Kim Anh
Wey Chia-sam
Hayes Thomas B.
Nguyen Trung
Nokia Networks Oy
Sherry Michael J.
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