Compensated phase locked loop for generating a controlled output

Details Compensated phase locked loop for generating a controlled output Compensated phase locked loop for generating a controlled output

1994-08-31

1996-01-09

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 25, H03L 718

Patent

active

054832020

ABSTRACT:
A method and apparatus for generating a controlled output clock signal which is frequency and phase referenced to an input signal is disclosed. The compensation is programmable to allow an external source, such as a processor, to download a compensation factor to create a variable frequency phase locked loop. A separate programmable divider is downloaded with a complimentary value to adjust the varied frequency signal to the frequency of the input signal.

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Lindsey, William C., and Chie, Chak Ming, "A Survey of Digital Phase-Locked Loops," Proceedings of the IEEE, vol. 69, No. 4, Apr. 1981, pp. 410-431.

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