Compensated digital delay semiconductor device with selectable o

Details Compensated digital delay semiconductor device with selectable o Compensated digital delay semiconductor device with selectable o

1992-02-14

1994-01-25

Westin, Edward P.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307603, 328 55, H03K 513

Patent

active

052818748

ABSTRACT:
A compensated digital delay semiconductor device is disclosed which uses two identical chains of delay elements. The first chain is the Reference Chain, which is driven by a crystal-controlled digital clock input. The second chain is the Input Signal Delay Chain, which is the delay path for the signal of interest. These two chains are located in physical proximity on the semiconductor die so that variations in the manufacturing process, temperature and power supply affect each chain the same. Circuitry monitors the delay performance of the Reference Chain, and dynamically changes the output tap of the Input Signal Delay Chain when a change in performance is detected on the Reference Chain, thereby compensating the delay of the device. This approach provides precise delays which are constant.

REFERENCES:
patent: 4119796 (1978-08-01), Jones
patent: 4868430 (1989-09-01), Stewart
patent: 4922141 (1990-05-01), Lofgren
patent: 4965815 (1990-10-01), Boudewijns
patent: 5087842 (1992-02-01), Pulsipher
patent: 5111086 (1992-05-01), Back

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