Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
1999-04-01
2001-01-23
Le, Dinh T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C112S311000, C112S311000, C112S311000
Reexamination Certificate
active
06177817
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor integrated circuit structures, and more particularly to an off-chip driver circuit for integrated circuits.
2. Background Art
U.S. Pat. No. 5,654,663 issued Aug. 5, 1997 to McClure et al. entitled CIRCUIT FOR PROVIDING A COMPENSATED BIAS VOLTAGE discloses a bias circuit for generating a bias voltage for a power supply voltage that comprises a voltage divider to generate a divided voltage based on a power supply value. The divided voltage is applied to a current mirror device which controls a current applied to a linear load device. The voltage across the load device determines the bias voltage.
U.S. Pat. No. 5,640,122 issued Jun. 17, 1997 to McClure entitled CIRCUIT FOR PROVIDING A BIAS VOLTAGE COMPENSATED FOR P-CHANNEL TRANSISTOR VARIATIONS discloses a bias circuit for generating a bias voltage that tracks power supply voltage variations that comprises a voltage divider to produce a ratioed voltage based on the power supply voltage to be tracked.
U.S. Pat. No. 5,581,197 issued Dec. 3, 1996 to Motley et al. entitled METHOD OF PROGRAMMING A DESIRED SOURCE RESISTANCE FOR A DRIVER STAGE discloses an output impedance in a CMOS output driver stage that is programmed and compensated by complementary current mirrors that are MOS devices in series with each of the conventional pull-up and pull-down devices.
U.S. Pat. No. 5,568,084 issued Oct. 22, 1996 to McClure et al. entitled CIRCUIT FOR PROVIDING A COMPENSATED BIAS VOLTAGE discloses a bias circuit for generating a bias voltage for a power supply voltage that comprises a voltage divider to generate a divided voltage based on a power supply value. The divided voltage is applied to a current mirror device which controls a current applied to a linear load device. The voltage across the load device determines the bias voltage.
U.S. Pat. No. 4,533,839 issued Aug. 6, 1985 to Balakrishnan entitled CURENT LIMITING CIRCUIT FOR HIGH CURRENT PERIPERAL DRIVERS discloses a driver circuit including a switching output transistor operated from a digital logic control and provided with a shut off circuit which turns the output transistor off when its collector supply current exceeds its saturation current.
U.S. Pat. No. 5,455,522 issued Oct. 3, 1995 to Jones entitled PROGRAMMABLE LOGIC OUTPUT DRIVER discloses a programmable logic output driver circuit that comprises a bias generator, a current mirror, an output stage and a programming feature to maintain the output voltage slew rate at an acceptable value for either high or low values of load capacitances.
U.S. Pat. No. 5,428,303 issued Jun. 27, 1995 to Pasqualini entitled BIAS GENERATOR FOR LOW GROUND BOUNCE OUTPUT DRIVER discloses a bias generator that includes a bias control signal generator, a current difference circuit with a resistive divider and a down current mirror that drives a final pull-down transistor of an output driver circuit.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an improved off-chip driver circuit for integrated circuits.
Another object of the present invention is to provide an improved off-chip driver circuit using a regulated current mirror output stage.
Still another object of the present invention is to provide an improved off-chip driver circuit with compensated current reference.
A further object of the present invention is to provide an improved off-chip driver circuit using NFET devices to control off-chip driver pulldown.
A still further object of the present invention is to provide an improved off-chip driver circuit using multiple stage current-mirror drive levels.
Other features, advantages and benefits of the present invention will become apparent in the following description taken in conjunction with the following drawings. It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory but are not to be restrictive of the invention.
The accompanying drawings which are incorporated in and constitute a part of this invention and, together with the description, serve to explain the principles of the invention in general terms. Like numerals refer to like parts throughout the disclosure.
REFERENCES:
patent: 4533839 (1985-08-01), Balakrishnan
patent: 5428303 (1995-06-01), Pasqualini
patent: 5455522 (1995-10-01), Jones
patent: 5568084 (1996-10-01), McClure et al.
patent: 5581197 (1996-12-01), Motley et al.
patent: 5640122 (1997-06-01), McClure
patent: 5654663 (1997-08-01), McClure et al.
patent: 5774013 (1998-06-01), Groe
Fifield John A.
Houghton Russell J.
Wilson Adam B.
Goodwin John J.
International Business Machines - Corporation
Le Dinh T.
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