Compensated CMOS driver circuit with reduced DC losses

Details Compensated CMOS driver circuit with reduced DC losses Compensated CMOS driver circuit with reduced DC losses

1994-07-29

1996-02-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

327379, 327111, 326 82, 326 83, H03K 1714

Patent

active

054914361

ABSTRACT:
According to the present invention, an improved integrated circuit is provided having a first, second and third FET device and wherein at least one performance characteristic of the first and second device varies in the same manner with the variations of one performance related process variable condition such that each of the first and second devices have an output signal changed by a change in that performance related variable condition, and the first and second devices are connected with the one output characteristic of the second device acting in opposition to that of the first device to provide a merged output signal representative of offsetting effects of the first and second devices. The third device is connected within a voltage divider and coupled to the first and second FET devices to turn off both the divider and the second device responsive to the merged output signal rising to a select value.

REFERENCES:
patent: 4614882 (1986-09-01), Parker et al.
patent: 4818901 (1989-04-01), Young et al.
patent: 4975595 (1990-12-01), Petrovick, Jr. et al.
patent: 4975598 (1990-12-01), Borkar
patent: 5177376 (1993-01-01), Wellnitz et al.
patent: 5293082 (1994-03-01), Bathaee
patent: 5329190 (1994-07-01), Igarashi et al.

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