Compensated analog multipliers

Details Compensated analog multipliers Compensated analog multipliers

1993-05-14

1995-08-15

Mai, Tan V.

Boots, shoes, and leggings

364844, G06G 716

Patent

active

054425832

ABSTRACT:
The multiplier which includes built-in adjustments to improve circuit performance. More specifically, the multiplier is a compensated multiplier to increase the accuracy and precision of computation using analog very large scale integrated (VLSI) circuits and consists of adjustable parameters which allow for the improvement of the linear range of behavior as well as the cancellation of input offsets. A differential multiplier is further described in which adjustable parameters in addition to the four inputs to the multiplier compensate for offsets and non-linearities to result in a highly accurate analog multiplier.

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