Comparison circuit for comparing semiconductor device output by

Details Comparison circuit for comparing semiconductor device output by Comparison circuit for comparing semiconductor device output by

1995-09-22

1997-08-19

Nguyen, Hoa I.

Excavating

3401462, G01R 3128

Patent

active

056595530

ABSTRACT:
This present invention provides a comparison circuit where the close limitation of the strobe timing is modified and the setting margin of the strobe timing is increased for semiconductor testing apparatuses. The comparison circuit is comprised of the decoder (301) to create the expected value signal (EXP) of the pattern generator 2 by decoding the HIGH and LOW level open signal, a circuit (403) which consists of a first interleave reading circuit and an interleave counter and which is made to inhibited its reading by the said open signals, a circuit (404) which consists of a second interleave reading circuit and an interleave counter and which is made to inhibited its reading by the said open signals, a first mask gate (408) which the output signal of the circuit (403), consisting of an interleave reading circuit and an interleave counter, and the said signal enter, and a second mask gate (409) which the output signal of the circuit (404), consisting of an interleave reading circuit and an interleave counter, and the said open signal enter.

REFERENCES:
patent: 4635256 (1987-01-01), Herlein
patent: 5365527 (1994-11-01), Honma

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