Comparing device

Details Comparing device Comparing device

1986-08-26

1987-09-22

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

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307362, H03K 524

Patent

active

046957480

ABSTRACT:
A comparing device comprises a first CMOS inverter (6) for detecting a difference between a voltage to be compared (Vin) and a reference voltage (Vref), a second CMOS inverter (9) connected directly to the first CMOS inverter (6) and a third CMOS inverter (11) connected directly to the second CMOS inverter (9), the input of the first CMOS inverter (6) and the output of the third CMOS inverter (11) being connected through a transmission gate (22). The current-driven capacity of the first CMOS inverter (6) is selected to be larger than that of the second inverter (9) and that of the third inverter (11) so that the difference between the voltage to be compared (Vin) and the reference voltage (Vref) can be detected precisely at high speed. The second inverter (9) and the third inverter (11) have a desired voltage amplifying function so that the voltage difference detected by the first inverter (6) can be amplified by these two inverters (9 and 11) and either of the binary outputs can be obtained at an output terminal (12).

REFERENCES:
patent: 3676702 (1972-07-01), McGrogan, Jr.
patent: 4461965 (1984-07-01), Chin
patent: 4547683 (1985-10-01), Bingham
Dingwall, Andrew G., "Monolithic Expandable 6 Bit 20 MHz CMOS/SOS A/D Converter", IEEE Journal of Solid State Circuits, vol. Sc-14, No. 6, Dec. 1979, pp. 926-932.

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