Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – With rotor
Reexamination Certificate
2002-09-23
2003-07-22
Cuneo, Kamand (Department: 2829)
Electricity: measuring and testing
Measuring, testing, or sensing electricity, per se
With rotor
C324S073100, C324S765010
Reexamination Certificate
active
06597165
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to compare path bandwidth control for high performance automatic test systems
BACKGROUND OF THE INVENTION
As integrated circuits become larger and faster the need for high performance automatic test systems becomes greater. Typically, integrated circuits or devices are tested using automatic test systems. For digital integrated circuits, a large portion of the testing consists of supplying input logic signals to some of the terminals of the integrated circuit and reading output logic signals from other terminals. These logic signals will consist of voltage levels representing a logic zero and a logic one. To detect the presence of these logic zeros and ones, the automatic test system should be capable of detecting the level of voltage pulses at varying frequencies. The input and output logic signals are typically applied and measured through a test head assembly which provides electrical contact and signals to the leads or contacts of the integrated circuit. The logic signal from the integrated circuit is fed through cables from the test head assembly to the main body of the test system where the signals are analyzed to determine the functionality of the integrated circuit or device under test (DUT). For low frequency applications (i.e. signal frequencies<100 MHz with a minimum pulse width of about 2.5 ns) a single ended cable and circuit configuration can be used to interconnect the test head assembly with the main body of the test system. A typical single ended cable and circuit configuration used in automated test systems is illustrated in FIG.
1
. The test head assembly
10
is interconnected to the main body of the test system
15
through cables
20
and
21
. For typical large pin integrated circuits there may be as many as 1024 such cables interconnecting the test head assembly
10
to the main body of the system
15
. As shown in
FIG. 1
, the cables
20
and
21
can be driven by amplifier/comparators
40
and
41
in a single ended configuration. The amplifiers/comparators
40
and
41
will be fed an input signal (I) derived from the integrated circuit through an input terminal
100
and will compare this input signal to reference signals VREFUP and VREFDN to determine if a logic one or a logic zero signal is being output from the integrated circuit. The output of the amplifiers/comparators
40
and
41
is fed through cables
20
and
21
to receivers
42
and
43
on the main body of the system
15
. The output of the receivers
42
and
43
will be used to determine if the integrated circuit under test passes or fails the particular functional test. Shown in
FIG. 1
is a typical configuration where the pass/fail logic
44
and
45
is a common circuit on a pin.
As the operating speeds of integrated circuits increase it is becoming increasingly necessary to test the functionality of the circuits at higher frequencies and narrower pulse widths. For some applications it is required to test the circuits at frequencies up to 800 MHz with minimum pulse widths of 625 ps. Under these conditions, the single ended configuration shown in
FIG. 1
may not work and some type of differential configuration will be required. A typical differential configuration is shown in FIG.
2
. In this scheme, amplifier/comparators
46
and
47
will produce an output signal and a complement output signal which is fed differentially through cables
22
,
23
,
24
and
25
to the main body of the system
15
where receivers
48
and
49
will be used along with pass/fail logic
44
and
45
to analyze the signal. It is important to note that such a differential scheme requires twice as many cables and interconnections as the low frequency single ended scheme substantially increasing the cost and complexity of the test systems. In addition to cabling, at least twice as many high frequency paths will be required on some of the circuit boards in both the test head assembly and the main body of the system also substantially increasing the cost and complexity of the test system. The differential interconnection schemes required for high frequency testing is a major limitation in the development of advanced high frequency automated integrated circuit test systems.
SUMMARY OF INVENTION
The instant invention is compare path bandwidth control for high performance automatic test systems. An embodiment of instant invention comprises: a first device with a plurality of input terminals and at least one output terminal wherein said first device is a comparator; a second device with a plurality of input terminals and at least one output terminal wherein said second device is a comparator; a third device with a plurality of input terminals and at least one output terminal wherein said third device is a buffer amplifier; a fourth device with a plurality of input terminals and at least one output terminal where said fourth device is a high speed buffer/differential receiver; a fifth device with a plurality of input terminals and at least one output terminal wherein said fifth device is a buffer amplifier; a first programmable voltage source connected to a first of said plurality of input terminals of said first device; a second programmable voltage source connected to a first of said plurality of input terminals of said second device; said first programmable voltage source and said second programmable voltage source can be programmed to the same or to different voltages; an input signal terminal connected to a second of said plurality of input terminals of said first device and a second of said plurality of input terminals of said second device; a first connecting element connecting an output of said first device to one of said plurality of inputs of said third device and to one of said plurality of inputs of said fourth device; a second connecting element connecting an output of said second device to one of said plurality of inputs of said fourth device and to one of said plurality of inputs of said fifth device; a sixth device with at least one output terminal where in said sixth device is a two-to-one multiplexer, a first input terminal connected to an output terminal of said third device, and a second input terminal connected to an output terminal of said fourth device; and a seventh device with at least one output terminal wherein said seventh device is a two-to-one multiplexer, a first input terminal connected to an output terminal of said fifth device, and a second input terminal connected to an output terminal of said fourth device.
The technical advantages of the instant invention will be readily apparent to one skilled in the art from the following FIGUREs, description, and claims.
REFERENCES:
patent: 4908576 (1990-03-01), Jackson
patent: 5210527 (1993-05-01), Smith et al.
patent: 6133725 (2000-10-01), Bowhers
patent: 6479985 (2002-11-01), Lambert
Brady III W. James
Cuneo Kamand
McLarty Peter K.
Nguyen Tung X.
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