Comparator with input offset current elimination

Details Comparator with input offset current elimination Comparator with input offset current elimination

1987-07-20

1988-07-26

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307355, 307358, 307491, 307494, 330257, 330261, H03K 524, H03K 5153

Patent

active

047602864

ABSTRACT:
A comparator circuit for use with other comparator circuits on a common resistive divider chain includes PNP input transistors operating in conjunction with a current mirror circuit, and input circuitry coupled between the divider chain and the PNP transistors for rendering the input bias currents to the PNP transistors equal when the comparator is in an unbalanced state. This circuitry is coupled to different potentials on the divider chain, and a current is derived from each of these potentials. These currents are essentially equal because they are each derived from the sum of half of the emitter currents of each input PNP transistor in the comparator. So, although the PNP transistor will have unequal currents when the inputs are not balanced, the input circuitry will balance these currents at all times.

REFERENCES:
patent: 4429284 (1984-01-01), Wheatley, Jr.
patent: 4446385 (1984-05-01), Orengo et al.
patent: 4506170 (1985-03-01), Mizuide
patent: 4680483 (1987-07-01), Giordano

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