Comparator with controllable bias current source

Details Comparator with controllable bias current source Comparator with controllable bias current source

1999-09-10

2001-11-27

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S077000

Reexamination Certificate

active

06323695

ABSTRACT:

TECHNICAL FIELD
This invention relates to a comparator having a differential amplifier, a signal input to which an input signal is applied, a reference input to which a reference voltage is applied, and a controllable bias for adjustment of a predetermined operating point of the differential amplifier.
BACKGROUND OF THE INVENTION
Examples of comparators are shown in U.S. Pat. Nos. 4,384,219 and 4,529,891. In both cases a differential amplifier stage with two transistors is connected on the high potential side via a constant current source with a supply voltage source and on the low potential side via a current mirror with a ground lead.
The speed of a comparator is known to be higher the greater the bias current. That is, the speed at which an effect occurs at the comparator output when the input signal thereof passes through the comparator threshold depends on the strength of the bias current. From the point of view of the speed of the comparator it would therefore be desirable to supply a bias current with high current strength.
A high bias current leads to accordingly high power consumption, however, which is undesirable, especially when power is supplied from a battery. Conventionally, one must therefore make a compromise between a tolerable power consumption and a tolerable speed of the comparator. The invention addresses the problem of providing a comparator which is not subject to this compromise but permits both high speed and low power consumption.
SUMMARY OF THE INVENTION
The embodiments disclosed herein provide a comparator that has a controllable bias current source for supplying a bias current having a low quiescent current strength or a higher active current strength as a function of whether the input signal is constant or variable at the moment.
In very many applications, in particular in the digital area, speed of the comparator is only required during times when the input signal varies, while in the times therebetween when the input signal remains constant the comparator can be indefinitely slow. During the times of a constant input signal a very low bias current is thus required and supplied according to the invention. During times of a varying input signal when speed of the comparator is important, the bias current is increased in order to ensure the speed of the comparator then desired. In the disclosed embodiments, a high bias current only flows during times of a varying input signal, while a very low bias current flows during the remaining times of a constant input signal, which are generally greatly predominant. Thus, the invention achieves a relatively low mean power consumption while nevertheless ensuring a high speed of the comparator at the crucial times.
In one embodiment of the invention, the controllable bias current source contains two current sources whose sum current is supplied to the differential amplifier as the bias current. One of said current sources is a constant current source which supplies a very low quiescent current, preferably in the range of a few microamperes. The other current source is an additional current source which supplies an additional current only during those times when the input signal varies.
Considering as an input signal, for example, a digital signal which changes between a constant low potential and a constant high potential, the transitions between low potential and high potential being formed by leading or trailing edges with a certain edge slope, the additional current source supplies an additional bias current only during the times of leading and trailing edges, while the additional bias current is zero between the edges, ie., during the time segments of constant low or constant high potential, and only the quiescent current from the constant current source is supplied as the bias current during such times. During the signal edges the comparator is fast by reason of the additional bias current, while it is slow, and only needs to be slow, during the time segments of constant potential.
In another disclosed embodiment, the level of the additional current is made dependent on the rate of the input signal variation during times when the input signal varies. This causes the comparator to be faster the steeper the input signal variation is. The speed of the comparator is thus adapted to the need for speed. If at very high speed in the comparator is required upon very fast or very steep input signal variation, it is given the necessary high bias current. However, if the comparator only needs to process less fast or less steep input signal variations, it is supplied a lower additional bias current, which keeps the mean power consumption especially low.
In accordance with one disclosed embodiment, an additional current source with a controllable current source and a capacitor connected between the signal input and a control input of the controllable current source is provided. The input signal is supplied to the capacitor. Designating the capacitor C, the capacitor current Ic, the input signal U and the time t, one obtains a capacitor current
Ic=dU/dt.
  (1)
Ic is nonzero only when voltage U varies so that dU/dt is nonzero.
In an embodiment of a comparator with a capacitor in the additional current source, it is recommendable to use two current sources, each with a capacitor, for example, a first current source and first capacitor supplying an additional current only during positively directed input signal variations, and a second current source and second capacitor supplying additional current only during negatively directed input signal variations. If one and the same capacitor were used both for positively and for negatively directed input signal variations, it would draw current from the input signal source during input signal variations in one direction in the desired fashion but would have to draw a current from the quiescent current source upon input signal variations in the other direction.
In an embodiment of the invention with additional current source constructed with one or two capacitors, the, or each, controllable current source has a current mirror that is given capacitor current Ic in an input branch and mirrors it to the biasing current terminal of the differential amplifier.
The differential amplifier can be constructed with further current mirrors in a way known in the art.


REFERENCES:
patent: 4384219 (1983-05-01), Davis
patent: 4442408 (1984-04-01), Le
patent: 4529891 (1985-07-01), Oida
patent: 4712021 (1987-12-01), Grollinger
patent: 5148119 (1992-09-01), Wright et al.
patent: 5343086 (1994-08-01), Fung et al.
patent: 5469092 (1995-11-01), Itakura
patent: 5543976 (1996-08-01), Dayton et al.
patent: 5548227 (1996-08-01), Minami
patent: 5796281 (1998-08-01), Saeki et al.
patent: 5945852 (1999-08-01), Kosiec
patent: 6121838 (2000-09-01), Freeman et al.
patent: 0 468 760 A (1992-01-01), None
patent: 0472340A1 (1992-02-01), None

Affiliated with

Also associated with

Rating

Comparator with controllable bias current source does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Comparator with controllable bias current source, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Comparator with controllable bias current source will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2616156