Comparator-offset compensating converter

Coded data generation or conversion – Converter compensation

Patent

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Details

341159, H03M 106, H03M 136

Patent

active

056965087

ABSTRACT:
An integrated circuit for converting an analog signal to a digital signal includes a resistor string comprised of a plurality of serially coupled resistors coupled between a high voltage reference and a low voltage reference. Intermediate taps are defined at the junctions of the resistors in the resistor string. At least one comparator has first and second inputs and an output. The first input of the comparator is capable of being selectively coupled to preselected ones of the intermediate taps. The second input is capable of being switched between an unknown analog input in conversion mode and a predetermined tap that provides a nominal voltage at the second input in calibration mode. A selection circuit for sequencing through the preselected ones of the intermediate taps selects one of the preselected ones of the intermediate taps as a selected tap for compensating for the offset of the at least one comparator. The selection circuit stores the selected tap for subsequent use during operation of the circuit.

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Analog-Digital Conversion Handbook, Third Edition, Prentice-Hall, Englewood cliffs, NJ 07632, Published by Prentice-Hall, pp. 218, 219, 355, 420-426.
Patent Abstracts of Japan, vol. 012, No. 026 (E-577), 26 Jan. 1988 & JP-A-86 023798 (Hitachi) 11 Aug. 1987, abstract.

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