Comparator having latched output when disabled from the power su

Details Comparator having latched output when disabled from the power su Comparator having latched output when disabled from the power su

1994-04-04

1996-01-30

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

327203, 327 70, H03K 3289, H03K 522

Patent

active

054883202

ABSTRACT:
A comparator (10) operates in comparator mode or in static leakage current test mode as determined by a control signal. In the comparator mode, the comparator receives a differential input signal for amplification through an analog differential front-end comparator input stage (31). The output of the comparator input stage is presented as a single-ended signal that is applied to an input of a buffer (32). The buffer amplifies the single-ended signal to digital logic levels. In test mode, the control signal enables a feedback circuit (36-42) from the output of the buffer back to its input and disables the differential front-end comparator input stage by removing the power supply. The last valid data state present at the output of the buffer is thus latched back to its input to allow static leakage current testing of down-stream circuitry without interference from the comparator drawing large static currents.

REFERENCES:
patent: 4970406 (1990-11-01), Fitzpatrick et al.
patent: 5001361 (1991-03-01), Tamamura et al.
patent: 5196737 (1993-03-01), Olmstead

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