Comparator for a pipelined analog-to-digital converter and...

Details Comparator for a pipelined analog-to-digital converter and... Comparator for a pipelined analog-to-digital converter and...

2011-03-08

2011-03-08

Young, Brian (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S155000

Reexamination Certificate

active

07903017

ABSTRACT:
A comparator for a pipelined ADC includes a sampling circuit coupled to a plurality of differential input voltages and a plurality of differential reference voltages, for sampling the plurality of differential input voltages according to a first clock signal and sampling the plurality of differential reference voltages according to a second clock signal, a preamplifier coupled to the sampling circuit comprising a positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, for amplifying a voltage across the positive input terminal and the negative input terminal for generating a plurality of differential output voltages, and a latch circuit coupled to the preamplifier for latching the plurality of differential output voltages.

REFERENCES:
patent: 6166675 (2000-12-01), Bright
patent: 6909391 (2005-06-01), Rossi
patent: 7009549 (2006-03-01), Corsi
luri Mehr and Larry Singer, A 55-mW, 10-bit, 40-Msample/s Nyquist-Rate CMOS ADC, Mar. 2000.

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