Comparator eliminating need for one's complement logic for...

Details Comparator eliminating need for one's complement logic for... Comparator eliminating need for one's complement logic for...

2007-10-16

2007-10-16

Ngo, Chuong D. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C340S146200

Reexamination Certificate

active

10287108

ABSTRACT:
An apparatus and method for providing high speed computing power with efficient power consumption in a computing environment comprising a comparator with at least one input feed; a sign selector in electronic communication with the comparator; and result flag generator in electronic communication with both the sign selector and the comparator. The sign selector has input data feeds and an equivalent number of dedicated indicators for identifying signed numbers from unsigned numbers for each of the input data feeds. The result flag generator receives a first resultant feed from the comparator and a second resultant feed from the sign selector. The sign selector can be designed to provide a resultant output. The resultant output is generated after collective operations have been performed on the input feeds and selectively on other feeds such as a sign feed and an Ini feed.

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B.D. Herrman, “MOSFET Look-Ahead Bit Incrementer/Decrementer,” IBM Technical Disclosure Bulletin, vol. 28, No. 2 (Jul. 1985), pp. 741-742.

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