Comparator circuit with reduced switching noise

Details Comparator circuit with reduced switching noise Comparator circuit with reduced switching noise

2008-07-22

2008-07-22

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S053000, C327S066000, C327S563000

Reexamination Certificate

active

07403045

ABSTRACT:
A comparator circuit includes a differential amplifier circuit, a latch circuit, and a control signal generating circuit. The latch circuit includes a pair of cross-coupled inverting amplifiers that pull the output signals of the differential amplifier to the high and low logic levels, a control transistor that activates the latch circuit in synchronization with a clock signal, and an equalizing transistor that equalizes the output signals when the latch circuit is inactive. The equalizing transistor is switched on and off by a control signal generated from the clock signal by the control signal generating circuit. The high-level potential of the control signal is lower than the high-level potential of the clock signal. Switching noise at the control electrode of the equalizing transistor is therefore reduced, permitting high-speed operation.

REFERENCES:
patent: 4717838 (1988-01-01), Brehmer et al.
patent: 5032744 (1991-07-01), Wai Yeung Liu
patent: 6215331 (2001-04-01), Setty et al.
patent: 7183812 (2007-02-01), Nairn
patent: 5-67950 (1993-03-01), None
patent: WO 2004/047292 (2004-06-01), None
Sedra and Smith. “Microelectronic Circuits”. 2004. Oxford University Press. Fifth Edition. p. 728.
Sedra and Smith. Microelectronic Circuits. 2004. Oxford University Press. Fifth Edition. p. 728.

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