Comparator circuit for positive and negative signals having...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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C327S080000, C327S076000

Reexamination Certificate

active

06362663

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to electronic circuits, and, more particularly, to a comparator circuit.
BACKGROUND OF THE INVENTION
In the case of serial interface devices internally provided with receivers and transmitters, it is important to detect the temporary absence of signals on the inputs of the receivers and to report such absence to a microprocessor The microprocessor can send a power-off signal to switch off the transmitter device of the serial interface, thus eliminating the consumption of the interface. Furthermore, the microprocessor can send a diagnostic signal to the system When a valid signal reaches the inputs of the receiver, the input is not floating or different from zero and the device resumes its normal operation.
For example, in the case of serial interfaces of the RS232 type, signals whose amplitude can vary between −30V and +30V can be present at the inputs of the receiver of the interface. Data communication occurs with signals having an amplitude of ±5V. A signal with an amplitude between −30V and +0.8V is recognized as low, whereas for amplitudes between 2.4V and +30V the input signal is considered high. A pull-own resistor forces the input to the ground value if the signal is absent.
The signal sent to the microprocessor for reporting an absence of signals on the inputs of the receivers is generated by a so-called wake-up logic output. The wake-up logic must be preset so that if the input signal of the receiver is 0 (i.e., a cable is disconnected or there is a lack of data communication) for a preset minimum time interval, then the wake-up system must be activated, sending the failure message (i.e., an absence of communication) to the microprocessor. The microprocessor stops the device, thus avoiding unnecessary power consumption. When the input signal exceeds preset thresholds, the wake-up system is deactivated and the device resumes its normal operation.
Some conventional circuits for addressing the above-described problem require static power consumption. Other conventional circuits, which may have no static consumption, are unable to simultaneously handle positive and negative signals with a single power source. In yet other conventional circuits it is necessary to use CMOS depletion type technology with the substrate connected to the highest supply voltage.
The first case, i.e., circuits that have static consumption, is illustrated by way of example in
FIG. 1
, which illustrates a double CMOS comparator whose static consumption is nonzero. In
FIG. 1
, Vtm− and Vtm+ respectively designate the negative and positive voltages, whereas Rin designates the signal input to the receiver of the interface device.
FIG. 2
illustrates a circuit which is capable of addressing the above-described problem, i.e., has zero consumption, but suffers the drawback that it is unable to detect the negative threshold in the absence of devices of the depletion type in single positive power supply conditions. Finally,
FIG. 3
illustrates a third circuit using CMOS depletion type technology which has difficulty in controlling the negative threshold voltage in the NMOS transistors. This technology further has difficulties in general in providing depletion devices of the standard BiCMOS type.
SUMMARY OF THE INVENTION
One object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and which is suitable for devices with a single positive power supply.
Another object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and which is capable of recognizing signals below a preset negative threshold without having negative supply voltages available.
A further object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and which allows the exclusive use of CMOS devices of the n-channel and p-channel enhancement type which are commonly integrated in conventional BiCMOS technologies.
Yet another object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and which further has minimal silicon implementation dimensions.
Still another object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and in which it is possible to vary the comparison thresholds independently of each other.
Another object of the present invention is to provide a comparator circuit for positive and negative signals having zero consumption and which is highly reliable and relatively easy to manufacture at competitive costs.
These and other objects are achieved by a comparator circuit for positive and negative signals having zero consumption, suitable for devices with a single positive power supply, which includes first and second comparator means connected in parallel that receive a common input signal and, respectively, a first positive threshold voltage and a second negative threshold voltage. The comparator circuit further includes a first logic means cascade-connected to the first and second comparator means
The first and second comparator means are respectively suitable to detect the crossing, on the part of the input signal, of the first and second threshold voltages. The second comparator means for detecting the crossing of the second threshold is provided by virtue of n-channel and p-channel MOS transistors of the enhancement type. A second logic means is cascade-connected to the first logic means and in turn connected to a monostable circuit.


REFERENCES:
patent: 5177376 (1993-01-01), Wellnitz et al.
patent: 5418472 (1995-05-01), Moench
patent: 5463335 (1995-10-01), Divakaruni et al.
patent: 5465059 (1995-11-01), Pan et al.
patent: 5929680 (1999-07-01), Lim
patent: 5933459 (1999-08-01), Saunders et al.

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