Comparator circuit for analog-to-digital converter

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S159000

Reexamination Certificate

active

06404373

ABSTRACT:

FIELD OF INVENTION
The present invention relates to a comparator circuit for analog-to-digital converter, especially to a comparator circuit with equalization effects that can be used in an analog-to-digital converter.
BACKGROUND OF INVENTION
The analog-to-digital converter (ADC) is a useful circuit in the application of signal processing. An ADC is used to convert analog signals into digital signals. Most frequently used ADC's include flash ADC, interpolative ADC, folding ADC, two stage ADC etc.
FIG. 1
shows the circuit diagram of a conventional flash ADC. As shown in this figure, a conventional ADC comprises a thermocode to binary signal decoder
10
that converts input signals into binary codes according to thermocodes generated by a comparator circuit to be described in details hereinafter. The thermocodes are generated as the result of comparing the voltages of the input signals with reference voltages in a series of comparators
24
a
,
24
b
,
24
c
and
24
d
. The reference voltages in the comparators
24
a
,
24
b
,
24
c
and
24
d
are in a constant ratio. For example, the reference voltage of comparator
24
a
may be greater than that of comparator
24
b
for an LSB (a least significant bit, i.e., the smallest resolvable voltage of the ADC). And so on.
In order to compare the voltage of the input signals with the reference voltages, the input signal Vin is input from an input line
22
and is forwarded to all comparators. A reference voltage Vref is input from a reference signal line
20
and is regulated by resistors
18
a
,
18
b
,
18
c
and
18
d
, such that reference voltages in the comparators are in a predetermined ratio. The operation of the comparator circuit is well known to those skilled in the art and detailed description thereof is thus omitted.
In order to enhance the accuracy of the comparator circuit, preamplifiers
14
a
,
14
b
,
14
c
and
14
d
are provided at the upstream position to comparators
24
a
,
24
b
,
24
c
and
24
d
, respectively. The function of the preamplifiers
14
a
,
14
b
,
14
c
and
14
d
is to amplify the input signals and the reference voltages, such that the small differences between the voltages of input signals and the reference voltages may be amplified. In such a circuit, the input signals Vin and the reference voltage Vref are first input to the preamplifiers
14
a
,
14
b
,
14
c
and
14
d
and are then forwarded to comparators
24
a
,
24
b
,
24
c
and
24
d
. After the voltage of an input signal is compared with the reference voltages, a thermocode representing the result of the comparison is generated. In this circuit, the offset voltage of the comparators and the preamplifiers may bring a decisive influence to the accuracy of the comparator circuit.
Take the CMOS flash ADC as an example. If the requirement for its resolution is 10 bits, 1,024 comparators will be needed in the comparator circuit. When the input voltage of the circuit is 2V, the offset voltage of every comparator shall be smaller than 1 mV (½ LSB). However, in an ordinary CMOS comparator, its offset voltage can be tens of mV. Even if preamplifiers are positioned in front of the comparators, the reaction speed of the total circuit will be damaged due to the high gain values of the preamplifiers. Although it is possible to enlarge the dimension of the transistors at the input of the amplifiers to reduce the offsets of the preamplifier brought by errors existing in the manufacture process, the total space occupied by the circuit will become too large for an ADC and the over loading of capacitance in the preamplifiers will damage the operation speed of the circuit. In addition, the offsets in the preamplifiers themselves will damage the accuracy of other components of the comparator circuit.
In the conventional art, the above-said problems may be solved by using an averaging circuit.
FIG. 2
shows an analog-to-digital converter with improved cell mismatch compensation as disclosed in U.S. Pat. No. 5,835,048. In this circuit, a string of resistors are connected to the outputs of the preamplifiers to average the offsets of the preamplifiers. After the averaging, the accuracy of the circuit may be improved, since the offsets of the preamplifiers are reduced.
Another approach to solve the above-said problem is disclosed by U.S. Pat. No. 5,175,505. This invention also used a string of resistors connected to the output of the preamplifiers to average the offsets of the preamplifiers. The major difference between the '048 patent and the '550 patent rest in that the '048 patent used an active load and the '550 patent used a passive load. As a result, in the '550 patent the resistors are used as the load of the preamplifiers and in the '048 patent the transistor with high output resistance is used as load. The '048 patent provided an improvement over the '550 patent, because the smaller the averaging resistance (the resistances connected in the horizontal direction) is, the better the averaging effects, i.e., the smaller the offset voltage, will be. However, when the averaging resistance is reduced, the gains of the preamplifiers will also be reduced. If the averaging effects of the circuit of both patents are the same, i.e., if both have the same averaging resistance, preamplifiers with greater gains will still have greater gains, even if the averaging resistors are added. In other words, when the space used by the resistors is the same, a preamplifier wherein the resistor is used as load will have a smaller gain than that of a preamplifier wherein the current source is used as load. This is the improvement provided by the '048 patent.
Although the above-mentioned inventions are capable of averaging the outputs of the preamplifiers, it inherited drawbacks as well. In these prior arts, when the resistance of the resistors applied to the outputs of the preamplifiers is small, gains of the preamplifiers will not be sufficient to provide their functions. On the other hand, if the resistance of the resistors is raised, the averaging effect of the resistors will be damaged.
Generally speaking, the averaging resistor shall have a resistance of several K Ohms to tens of K Ohms to provide averaging effects. In such a range, the amplifying effect of the preamplifiers may also be maintained. However, the total space occupied by the resistors will become too large to be included in a commercial IC chip.
In addition to that, applying averaging resistors at the outputs of the preamplifiers does not solve the influence brought to the comparator by the offset of the input voltage.
It is thus a need in the industry to provide a novel comparator circuit for an analog-to-digital converter which may effectively reduce the offset of the comparator circuit.
It is also necessary to provide a novel comparator circuit for an analog-to-digital converter in which the offset voltages of the comparator circuit may be averaged.
It is also necessary to provide a novel comparator circuit for an analog-to-digital converter wherein offsets of signals may be effectively reduced without the need of providing additional space for circuits.
OBJECTIVES OF THE INVENTION
The objective of this invention is to provide a novel comparator circuit for an analog-to-digital converter which may effectively reduce the offset of the comparator circuit.
Another objective of this invention is to provide a novel comparator circuit for an analog-to-digital converter in which the offset voltages of the comparator circuit may be averaged.
Another objective of this invention is to provide a novel comparator circuit for an analog-to-digital converter wherein offsets of signals may be effectively reduced without the need of providing additional space for circuits.
SUMMARY OF INVENTION
According to the comparator circuit for analog-to-digital converter of this invention, the comparator circuit may be used in an analog-to-digital converter comprising: an input voltage signal line; a reference voltage signal line; a plurality of comparators connected in para

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