Comparator circuit

Details Comparator circuit Comparator circuit

1992-01-22

1994-02-15

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307279, 307530, 307491, 307443, 307494, 307572, H03K 524, H03K 1716

Patent

active

052870154

ABSTRACT:
An apparatus is disclosed for comparing a first input signal with a second input signal and generating an output signal representative of that comparison in response to a system clock signal. The apparatus comprises a plurality of amplifying circuits. A first amplifying circuit generates a pair of first amplifier signals representative of the input signals applied to the apparatus. A second amplifying circuit receives the pair of first amplifier signals and generates a pair of second amplifier signals representative of the pair of first amplifier signals. A delay circuit receives the system clock signal and generates a delayed clock signal which follows the system clock signal by predetermined interval. A first switching circuit is operatively connected across the first amplifier outputs and responds to the system clock signal. A second switching circuit is operatively connected across the second amplifier outputs and is responsive to the delayed clock signal. The predetermined interval between the system clock signal and the delayed clock signal is preferably appropriate to facilitate substantial decay of noise introduced into the pair of first amplifier signals by the opening of the first switching circuit.

REFERENCES:
patent: 4028558 (1977-06-01), Heller et al.
patent: 4150311 (1979-04-01), Matsuda et al.
patent: 4511810 (1985-04-01), Yukawa
patent: 4644197 (1987-02-01), Flannagan
patent: 4883987 (1989-11-01), Fattaruso
patent: 4900952 (1990-02-01), Hosotani et al.

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