Comparator bank of A/D converter

Details Comparator bank of A/D converter Comparator bank of A/D converter

1987-07-23

1989-05-02

Shoop, Jr., William M.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

357 68, 341159, H03M 178, H03M 136

Patent

active

048272620

ABSTRACT:
A comparator bank of an A/D converter comprising a plurality of comparators arranged into rows in a folded-back shape and a supply voltage line and a ground line in parallel with each other and connected to the comparators to provide reference potentials thereto according to a distribution shape which rises and falls continuously along the rows of the comparators whereby the linearity of the A/D converter is effectively maintained. The nodes of the comparators do not intersect and are arranged to successively become further from reference points set at the terminals of the supply voltage and ground lines.

REFERENCES:
patent: 3365707 (1968-01-01), Mayhew
"WAM 2.7: CMOS 8b 25MHz Flash ADC", Tsukada et al, IEEE International Solid-State Circuits Conference, 1985.
"Monolithic Expandable 6 Bit 20MHz CMOS/SOS A/D Converter", Dingwall, IEEE Hournal of Solid-State Circuits, vol. SC 14, No. 6, pp. 926-932, Dec. 1979.

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