Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-03-22
2001-09-11
Gaffin, Jeffrey (Department: 2841)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S256000, C174S260000, C361S760000, C361S792000, C361S794000, C361S800000
Reexamination Certificate
active
06288345
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to microwave integrated circuits, and more particularly to techniques for filtering, shielding and routing dc and control signals in such devices.
BACKGROUND OF THE INVENTION
Most microwave integrated circuits use individually manufactured pins as part of their signal routing. These pins have a built in capacitance to ground for filtering purpose, with a tolerance variation of ±50%. These variations contribute to performance degradation.
Furthermore, these pins come as individual packages. It takes a considerable amount of time and effort in the installation processes, which adds cost.
SUMMARY OF THE INVENTION
An aspect of this invention is a single compact thick film substrate for filtering, shielding, and routing multiple lines of dc and control signals between isolated ports of a microwave integrated circuit (MIC). This reduces multiple number of processes and parts to a single process and a single part. Z-axis dc routing is used so that signals are placed where they are needed, avoiding wire jumping of RF signal traces.
The substrate circuit includes a dielectric substrate having upper and lower substrate surfaces and first and second side surfaces. A first ground plane layer is formed on the upper substrate surface. A first thick film assembly is formed on the first ground plane layer, and includes a first thin dielectric layer, a first set of thin conductive traces formed on the thin dielectric layer and onto the first and second side surfaces terminating in a first set of edge trace pads formed on the first side surface and a second set of edge trace pads formed on the second side surface, a second thin dielectric layer formed over the upper substrate surface covering the first set of traces such that the traces are sandwiched and shielded between adjacent first surfaces of the first and second dielectric layers, and a second ground plane formed on a second surface of the second dielectric layer. The first and second sets of trace pads are exposed for connection to adjacent circuitry. A second thick film assembly can be formed on the lower surface of the substrate to provide third and fourth sets of trace pads for connection to the adjacent circuitry.
REFERENCES:
patent: 3760091 (1973-09-01), Cannizzaro et al.
patent: 4812792 (1989-03-01), Leibowitz
patent: 5471368 (1995-11-01), Downie et al.
patent: 5600101 (1997-02-01), Sakai
patent: 5635669 (1997-06-01), Kubota et al.
patent: 5847930 (1998-12-01), Kazle
patent: 6175088 (2000-09-01), Saccocio
patent: 6212078 (2000-04-01), Hunt et al.
Akale Tamrat
Allison Robert C.
Dalconzo Lawrence
Harris James M.
Alkov Leonard A.
Gaffin Jeffrey
Lenzen, Jr. Glenn H.
Patel Ishwar B.
Raytheon Company
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