Compact switched-capacitor FIR filter implementation

Details Compact switched-capacitor FIR filter implementation Compact switched-capacitor FIR filter implementation

2007-11-06

2011-12-06

Mai, Tan V (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical analog calculating computer

Particular function performed

Reexamination Certificate

active

08073894

ABSTRACT:
A system is provided to perform non-recursive signal processing tasks using a sampled data technique and a network of switched-capacitor filters. The input analog signal is sampled in a time sequence manner at regular time intervals in order to obtain analog-valued samples. These samples are collected into data blocks and the data blocks are assembled into a set of data blocks. The successive data blocks belonging to a set of data blocks partially overlap with the first data block. The non-recursive signal processing is performed on all of the data blocks of the set substantially simultaneously, using a parallel network of switched capacitor filters, in order to produce a processed analog output signal. Each individual processing path of the parallel network of switched capacitor filters processes a specific data block of the set of data blocks. The number of parallel processing paths is the same as one plus the degree of the polynomial representing the desired or overall input/output equation characterizing the non-recursive signal processing. An implementing architecture can be simplified by factorizing the polynomial representing the input/output equation into smaller sized polynomial sub-tasks that can each be implemented by a sub-system of parallel network of switched capacitor filters of smaller complexity.

REFERENCES:
patent: 4633425 (1986-12-01), Senderowicz
patent: 4972436 (1990-11-01), Halim et al.
Lee et al., “A Switched-Capacitor Realization of Multiple FIR Filters on a Single Chip”,IEEE Journal of Solid-State Circuits, vol. 23, No. 2, pp. 536-542, Apr. 1988.

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