Compact SRAM cell with polycrystalline silicon diode load

Details Compact SRAM cell with polycrystalline silicon diode load Compact SRAM cell with polycrystalline silicon diode load

1989-10-30

1991-06-04

James, Andrew J.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 59, 357 13, 357 71, 357 15, 365175, H01L 2968, H01L 2990, H01L 2904, G11C 1136

Patent

active

050218492

ABSTRACT:
A compact SRAM cell and method for its fabrication are disclosed. The small size of the SRAM cell is achieved by fabricating a diode load immediately above the gate electrode of each of the cross coupled transistors of the cell. In accordance with one embodiment, the gate electrode and diode structure include, in sequence, an N-type doped polycrystalline silicon layer, an electrically conductive diffusion barrier layer, a P-type doped polycrystalline silicon layer and an N-type doped polycrystalline layer.

REFERENCES:
patent: 4654824 (1987-03-01), Thomas et al.
patent: 4675715 (1987-06-01), Lepselter et al.
patent: 4804636 (1989-02-01), Groover, III et al.
patent: 4831424 (1989-05-01), Yoshida et al.
patent: 4903096 (1990-02-01), Masuoka et al.
patent: 4907052 (1990-03-01), Takada et al.
patent: 4922455 (1990-05-01), Chin et al.
patent: 4933735 (1990-06-01), Potash et al.

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